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AD73322L Datenblatt(PDF) 37 Page - Analog Devices

Teilenummer AD73322L
Bauteilbeschribung  Low Cost, Low Power CMOS General-Purpose Dual Analog Front
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Direct Link  http://www.analog.com
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AD73322L Datenblatt(HTML) 37 Page - Analog Devices

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AD73322L
Rev. A | Page 36 of 48
GROUNDING AND LAYOUT
DIGITAL GROUND
ANALOG GROUND
Because the analog inputs to the AD73322L are differential,
most of the voltages in the analog modulator are common-
mode voltages. The excellent common-mode rejection of the
part removes common-mode noise on these inputs. The analog
and digital supplies of the AD73322L are independent and
separately pinned out to minimize coupling between analog and
digital sections of the device. The digital filters on the encoder
section will provide rejection of broadband noise on the power
supplies, except at integer multiples of the modulator sampling
frequency. The digital filters also remove noise from the analog
inputs provided the noise source does not saturate the analog
modulator. However, because the resolution of the AD73322L’s
ADC is high, and the noise levels from the AD73322L are so
low, care must be taken with regard to grounding and layout.
Figure 47. Ground Plane Layout
Avoid running digital lines under the device because they
couple noise onto the die. The analog ground plane should be
allowed to run under the AD73322L to avoid noise coupling.
The power supply lines to the AD73322L should use as large a
trace as possible to provide low impedance paths and reduce the
effects of glitches on the power supply lines. Fast switching
signals, such as clocks, should be shielded with digital ground
to avoid radiating noise to other sections of the board. Clock
signals should never be run near the analog inputs. Traces on
opposite sides of the board should run at right angles to each
other. This reduces the effects of feedthrough on the board. A
microstrip technique is by far the best to use, but is not always
possible with a double-sided board. In this technique, the
component side of the board is dedicated to ground planes,
while signals are placed on the other side.
TFS
DT
DR
RFS
AD73322L
CODEC
SDIFS
SDI
SCLK
SDO
SDOFS
SCLK
DEVICE 1
MCLK
SE
RESET
AD73322L
CODEC
SDIFS
SDI
SCLK
SDO
SDOFS
DEVICE 2
MCLK
SE
74HC74
Q1
Q2
D1
D2
FL0
FL1
ADSP-218x
DSP
RESET
Good decoupling is important when using high speed devices.
On the AD73322L, both the reference (REFCAP) and supplies
need to be decoupled. It is recommended that the decoupling
capacitors used on both REFCAP and the supplies be placed as
close as possible to their respective pins to ensure high
performance from the device. All analog and digital supplies
should be decoupled to AGND and DGND respectively, with
0.1 µF ceramic capacitors in parallel with 10 µF tantalum
capacitors. In systems where a common-supply voltage is used
to drive both the AVDD and DVDD of the AD73322L, it is
recommended that the system’s AVDD supply be used. This
supply should have the recommended analog supply decoupling
between the AVDD pins of the AD73322L and AGND and the
recommended digital supply decoupling capacitors between the
DVDD pin and DGND.
Figure 46. Connection of Two AD73322Ls Cascaded to ADSP-218x
The printed circuit board that houses the AD73322L should be
designed so the analog and digital sections are separated and
confined to certain sections of the board. The AD73322L pin
configuration offers a major advantage in that its analog and
digital interfaces are connected on opposite sides of the
package. This facilitates the use of ground planes that can be
easily separated, as shown in Figure 47. A minimum etch
technique is generally best for ground planes because it gives
the best shielding. Digital and analog ground planes should be
joined in only one place. If this connection is close to the
device, it is recommended a ferrite bead inductor be used, as
shown in Figure 47.


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