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CS53L32A-KZZ Datenblatt(PDF) 3 Page - Cirrus Logic

Teilenummer CS53L32A-KZZ
Bauteilbeschribung  Low Voltage, Stereo A/D Converter
Download  40 Pages
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Hersteller  CIRRUS [Cirrus Logic]
Direct Link  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS53L32A-KZZ Datenblatt(HTML) 3 Page - Cirrus Logic

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CS53L32A
DS513F1
3
LIST OF FIGURES
Figure 1. SCLK to LRCK and SDOUT, Slave Mode ..................................................................... 11
Figure 2. SCLK to LRCK and SDOUT, Master Mode ................................................................... 11
Figure 3. Relationship Required Between LRCK and MCLK in Slave Mode ................................ 11
Figure 4. Control Port Timing - Two Wire Mode............................................................................ 12
Figure 5. Control Port Timing - SPI Mode ..................................................................................... 13
Figure 6. Typical Connection Diagram .......................................................................................... 14
Figure 7. Control Port Timing, SPI Mode ...................................................................................... 32
Figure 8. Control Port Timing, Two Wire Mode............................................................................. 32
Figure 9. Base-Rate Stopband Rejection...................................................................................... 33
Figure 10. Base-Rate Transition Band.......................................................................................... 33
Figure 11. Base-Rate Transition Band (Detail) ............................................................................. 33
Figure 12. Base-Rate Passband Ripple........................................................................................ 33
Figure 13. High-Rate Stopband Rejection .................................................................................... 33
Figure 14. High-Rate Transition Band........................................................................................... 33
Figure 15. High-Rate Transition Band (Detail) .............................................................................. 34
Figure 16. High-Rate Passband Ripple......................................................................................... 34
Figure 17. Line Input Test Circuit .................................................................................................. 34
Figure 18. CS53L32A Control Port Mode - Serial Audio Format 0 (I2S) ....................................... 34
Figure 19. CS53L32A Control Port Mode - Serial Audio Format 1 ............................................... 35
Figure 20. CS53L32A Control Port Mode - Serial Audio Format 3 ............................................... 35
Figure 21. CS53L32A Control Port Mode - Serial Audio Format 4 ............................................... 35
Figure 22. CS53L32A Control Port Mode - Serial Audio Format 5 ............................................... 36
Figure 23. CS53L32A Control Port Mode - Serial Audio Format 6 ............................................... 36
Figure 24. CS53L32A Stand-Alone Mode - Serial Audio Format 0 (I2S) ...................................... 36
Figure 25. CS53L32A Stand-Alone Mode - Serial Audio Format 1............................................... 37
LIST OF TABLES
Table 1. Analog Input Options....................................................................................................... 18
Table 2. Power-Down Enable ....................................................................................................... 19
Table 3. Control Port Enable......................................................................................................... 19
Table 4. Master Clock Divide Select .............................................................................................20
Table 5. MCLK/LRCK Ratios ........................................................................................................ 20
Table 6. Master/Slave Mode Selection ......................................................................................... 21
Table 7. Digital Interface Format................................................................................................... 21
Table 8. Left/Right Channel Mute Enable ..................................................................................... 22
Table 9. Analog Volume Control ................................................................................................... 23
Table 10. Digital Volume Control .................................................................................................. 23
Table 11. Independent Volume Control Enable ............................................................................ 23
Table 12. High-Pass Filter Enable ................................................................................................ 24
Table 13. Example Volume Settings ............................................................................................. 25
Table 14. Example Gain Settings.................................................................................................. 26
Table 15. Clip Detection Status Bits.............................................................................................. 26
Table 16. Common Clock Frequencies......................................................................................... 28
Table 17. Digital Interface Format - DIF (Stand-Alone Mode)....................................................... 28
Table 18. Channel Select Options ................................................................................................28
Table 19. Revision Table .............................................................................................................. 40


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