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ML145443RP Datenblatt(PDF) 5 Page - LANSDALE Semiconductor Inc.

Teilenummer ML145443RP
Bauteilbeschribung  Single?밅hip 300?밄aud Modem
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Hersteller  LANSDALE [LANSDALE Semiconductor Inc.]
Direct Link  http://www.lansdale.com
Logo LANSDALE - LANSDALE Semiconductor Inc.

ML145443RP Datenblatt(HTML) 5 Page - LANSDALE Semiconductor Inc.

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LANSDALE Semiconductor, Inc.
ML145442, ML145443
RxA2, RxA1
Receive Carrier (Pins 15, 16)
The receive carrier is the FSK input to the demodulator through
the receive band–pass filter. RxA1 is the non–inverting input and
RxA2 is the inverting input of the receive hybrid (duplexer) oper-
ational amplifier.
LB
Analog Loopback (Pin 2)
When a high level is applied to this pin (SQT must be low), the
analog loopback test is enabled. The analog loopback test con-
nects the TxA pin to the RxA2 pin and the RxA1 to analog
ground. In loopback, the demodulator frequencies are switched to
the modulation frequencies for the selected mode. (See Tables 1
and 2 and Figures 4c and 4d.)
When LB is connected to analog ground (VAG), the modulator
generates an echo cancellation tone of 2100 Hz for ML145442
CCITT V.21 and 2225 Hz for ML145443 Bell 103 systems. For
normal operation, this pin should be at a logic low level (VSS).
The power–down mode is enabled when both LB and SQT are
connected to a logic high level (see Table 2).
MODE
Mode (Pin 13)
This input selects the pair of transmit and frequencies used dur-
ing modulation and demodulation. When a logic high level is
placed on this input, originate (Bell) or channel 1(CCITT) is
selected. When a low level is placed on this input, answer (Bell) or
channel 2 (CCITT) is selected. (See Tables 1 and 2 and Figure 4.)
CDT
Carrier Detect Timing (Pin 4)
A capacitor on this pin to VSS sets the amount of time the car-
rier must be present before CD goes low (see Legacy Applications
Information for the capacitor values).
CD
Carrier Detect Output (Pin 3)
This output is used to indicate when a carrier has been sensed
by the carrier detect circuit. This output goes to a logic low level
when a valid signal above the maximum threshold level (defined
by CDA, pin 7) is maintained on the input to the hybrid circuit
longer then the response (defined by CDT, pin 4). This pin is held
at the logic low level until the signal falls below the maximum
threshold level for longer than the turn off time. (See Legacy
Applications Information and Figure 5.)
CDA
Carrier Detect Adjust (Pin 7)
An external voltage may be applied to this pin to adjust the car-
rier detect threshold. The threshold hysteresis is internally fixed at
3 dB (see Legacy Applications Information).
Xout, Xin
Crystal Oscillator (Pins 8, 9)
A crystal reference oscillator is formed when a 3.579 MHz
crystal is connected between these two pins. Xout (pin 8) is the
output of the oscillator circuit, and Xin (pin 9) is the input to the
oscillator circuit. When using an external clock, apply the clock to
the Xin (pin 9) pin and leave Xout (pin 8) open. An internal 10
MΩ resistor and internal capacitors, typically 10 pF on Xin and
16 pF on Xout, allow the crystal to be connected without any
other external components. Printed circuit board layout should
keep external stray capacitance to a minimum.
FB
Filter Bias (Pin 10)
This is the negative input to the AC amplifier. In normal opera-
tion, this pin is connected to analog ground through a 0.1µF
bypass capacitor in order to cancel the input offset voltage of the
limiter. It has a nominal input impedance of 16 kΩ (see Figure 3).
SQT
Transmit Squelch (Pin 14)
When this input pin is at a logic high level, the modulator is
disabled. The line driver remains active if LB is at a logic low
level (see Table 2).
When both LB and SQT are connected to a logic high level (see
Table 2), the entire chip is in a power down state and all circuitry
except the crystal oscillator is disabled. Total power supply cur-
rent decreases from 10 mA (max) to 300 µA (max).
0.1
µF
FB
16 k
10
490 k
+
FROM
BAND–PASS
FILTER
TO
CARRIER DETECT CIRCUIT
AND DEMODULATOR
Figure 3. AC Amplifier Circuit
Table 2. Functional Table
MODE
Pin 13
SQT
Pin 14
LB
Pin 2
Operating Mode
1
0
0
Originate Mode
0
0
0
Answer Mode
X
0
VAG (VDD/2) Echo Tone
X
0
1
Analog Loopback
X
1
0
Squelch Mode
X
1
VAG (VDD/2) Squelch Mode
X
1
1
Power Down
Issue b


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