Datenblatt-Suchmaschine für elektronische Bauteile |
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L6227PD Datenblatt(PDF) 9 Page - STMicroelectronics |
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L6227PD Datenblatt(HTML) 9 Page - STMicroelectronics |
9 / 22 page 9/22 L6227 TRUTH TABLE X = Don't care High Z = High Impedance Output GND (Vs) = GND during Ton, Vs during Toff (*) Valid only in case of load connected between OUT1 and OUT2 PWM CURRENT CONTROL The L6227 includes a constant off time PWM current controller for each of the two bridges. The current control circuit senses the bridge current by sensing the voltage drop across an external sense resistor connected be- tween the source of the two lower power MOS transistors and ground, as shown in Figure 7. As the current in the load builds up the voltage across the sense resistor increases proportionally. When the voltage drop across the sense resistor becomes greater than the voltage at the reference input (VREFA or VREFB) the sense com- parator triggers the monostable switching the low-side MOS off. The low-side MOS remain off for the time set by the monostable and the motor current recirculates in the upper path. When the monostable times out the bridge will again turn on. Since the internal dead time, used to prevent cross conduction in the bridge, delays the turn on of the power MOS, the effective off time is the sum of the monostable time plus the dead time. Figure 7. PWM Current Controller Simplified Schematic Figure 8 shows the typical operating waveforms of the output current, the voltage drop across the sensing re- sistor, the RC pin voltage and the status of the bridge. Immediately after the low-side Power MOS turns on, a high peak current flows through the sensing resistor due to the reverse recovery of the freewheeling diodes. The L6227 provides a 1 µs Blanking Time tBLANK that inhibits the comparator output so that this current spike cannot prematurely re-trigger the monostable. INPUTS OUTPUTS Description (*) EN IN1 IN2 OUT1 OUT2 L X X High Z High Z Disable H L L GND GND Brake Mode (Lower Path) H H L Vs GND (Vs) Forward H L H GND (Vs) Vs Reverse H H H Vs Vs Brake Mode (Upper Path) DRIVERS + DEAD TIME S Q R DRIVERS + DEAD TIME 2H 1H 2L 1L OUT2A(or B) SENSEA(or B) RSENSE D02IN1352 RCA(or B) R C VREFA(or B) IOUT OUT1A(or B) + + - - 1 µs 5mA BLANKER SENSE COMPARATOR COMPARATOR OUTPUT MONOSTABLE RESET 2.5V 5V FROM THE LOW-SIDE GATE DRIVERS LOADA (or B) BLANKING TIME MONOSTABLE VSA (or B) TO GATE LOGIC (0) (1) |
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