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ACT4910QW Datenblatt(PDF) 18 Page - Active-Semi, Inc |
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ACT4910QW Datenblatt(HTML) 18 Page - Active-Semi, Inc |
18 / 34 page ACT4910QW Rev 1.0, 15-Sept-2017 Innovative PowerTM www.active-semi.com ActiveSwitcherTM is a trademark of Active-Semi Copyright © 2017 Active-Semi, Inc. 18 Pin Functions VIN VIN is the input the eFuse. Connect a 0.1uF ceramic capacitor between VIN and PGND. VIN is directly connected to VOUT in normal operation. The eFuse disconnects VIN from VOUT when the IC enters supplement mode. EN The EN pin is the ACT4910 enable input used to turn the eFuse on or off. It provides both overvoltage and undervoltage protection thresholds. The EN pin contains a precision comparator with hysteresis. It can be directly driven from a digital input to turn the eFuse on and off. The EN pin can also be used with a resistor divider from VIN to VSS to program an eFuse startup voltage higher than the IC’s UVLO value. The EN pin also contains an overvoltage comparator. The eFuse turns on when the input EN pin goes above the EN_UV_REF threshold. Once the eFuse is on, it turns off and enters supplement mode if the EN pin goes above the EN_OV_REF threshold or below the EN_UV_REF threshold. The EN pin should not be left floating. It can be driven from standard logic signals greater than EN_UV_REF. It can also be driven with open-drain logic to provide. When driving it with an open-drain, ensure that the pullup voltage is not higher than the EN_OV_REF setting. EN_UV_REF is fixed at 0.64V. However, the EN_OV_REF can be programmed by I2C bits EN_OV_REF [2:0]. The default EN_OV_REF voltage is set by the IC’s CMI. Table 2: Over Voltage Reference Settings EN_OV_REF[2:0] OV Threshold (V) 000 Disabled 001 0.82 010 0.92 011 1.00 100 1.08 101 1.16 110 1.24 111 1.32 STR STR is the output to the storage capacitor bank. In normal operation the internal boost converter charges the storage capacitors through the STR pin. When the IC enters supplement mode, the internal buck converter uses the STR pin as its input to power the system. The STR pin typically has a 22uF or greater ceramic capacitor. See the Buck Converter section for more information. IRQ—Interrupt ACT4910 has an interrupt pin to inform the host of any fault conditions. In general, any IC function with a status bit asserts nIRQ if the status changes. The status changes can be masked by setting the corresponding register bits. If nIRQ is asserted low, the fault must be read before the IC deasserts nIRQ. If the fault remains after reading the status bits, nIRQ remains asserted. The below status changes will set the IRQ: Input overvoltage, undervoltage Thermal warning, thermal shutdown eFuse VIN to VOUT over limits eFuse current warning and limit Storage capacitor overvoltage, undervoltage Supplemental mode active Buck operation faults Buck undervoltage shutdown REF LDO undervoltage ADC data is ready ADC beyond set limits nIRQ is an open-drain output and should be pulled up to an appropriate supply voltage with a 10kΩ or greater pull-up resistor. SCL, SDA SCL and SDA are the I2C clock and data pins to the IC They have standard I2C functionality. They are open- drain outputs and each require a pull-up resistor. The pull-up resistor is typically tied to the system’s uP IO pins. The pullup voltage can range from 1.8V to 5.0V. REF The REF pin is an internal bias voltage output pin. Connect a 1µF capacitor between REF and VSS. Do not apply an external load to the REF pin. BSET BSET sets the boost converter output voltage. The output voltage is a function of both a resistor connected between BSET and VSS as well as internal I2C register |
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