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AD8372ACPZ-R7 Datenblatt(PDF) 9 Page - Analog Devices |
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AD8372ACPZ-R7 Datenblatt(HTML) 9 Page - Analog Devices |
9 / 16 page Data Sheet AD8372 Rev. C | Page 9 of 16 0 5 10 15 20 25 30 35 40 45 50 20 40 60 80 100 120 140 160 180 200 AV = 10dB AV = 20dB AV = 32dB 0 FREQUENCY (MHz) AV = 0dB Figure 11. Noise Figure vs. Frequency –90 –80 –70 –60 –50 –40 –30 –20 –10 0 FREQUENCY (Hz) 1M 10M 100M 1G Figure 12. Isolation, Input to Opposite Output at Maximum Gain (To calculate output to output gain, subtract 29 dB from this plot) 20ns/DIV Figure 13. AD8372 Response to 6 dB Step Change in Gain (Gain Register Setting 36 to Setting 42); Falling Edge Shown is Serial Clock Input Edge |
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Ähnliche Beschreibung - AD8372ACPZ-R7 |
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