74ACT138

2/10

INPUT AND OUTPUT EQUIVALENT CIRCUIT

PIN DESCRIPTION

TRUTH TABLE

X : Don’t Care

LOGIC DIAGRAM

This logic diagram has not be used to estimate propagation delays

PIN No

SYMBOL

NAME AND FUNCTION

1, 2, 3

A, B, C

Address Inputs

4, 5

G2A, G2B

Enable Inputs

6

G1

Enable Input

15, 14, 13,

12, 11, 10, 9,

7

Y0 to Y7

Outputs

8

GND

Ground (0V)

16

Positive Supply Voltage

INPUTS

OUTPUTS

ENABLE

SELECT

G2B

G2A

G1

CBA

Y0

Y1

Y2

Y3

Y4

Y5

Y6

Y7

X

X

L

X

X

X

HHHHH

HHH

XH

XXXX

HHHHH

HHH

HXXXXX

HHHHH

HHH

LL

H

LLLL

HHHH

HHH

L

L

H

L

L

H

H

L

HHH

HHH

L

L

H

L

H

L

HH

L

H

H

HHH

L

L

H

L

HHHHH

L

H

HHH

L

L

HH

L

L

HHHH

L

HHH

L

L

HH

L

HHHHHH

L

H

H

L

L

HHH

L

HHHHH

H

L

H

L

L

HHHHHHHHH

HH

L