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ADSP-2196MBCA-140X Datenblatt(PDF) 7 Page - Analog Devices |
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ADSP-2196MBCA-140X Datenblatt(HTML) 7 Page - Analog Devices |
7 / 68 page This information applies to a product under development. Its characteristics and specifications are subject to change with- out notice. Analog Devices assumes no obligation regarding future manufacturing unless otherwise agreed to in writing. 7 REV. PrA For current information contact Analog Devices at 800/262-5643 ADSP-2196 September 2001 35(/,0,1$5< 7(&+1,&$/ '$7$ On-Chip Memory Security The ADSP-2196 has a maskable option to protect the contents of on-chip memories from being accessed. When the ROM protection is set, the on-chip ROM space cannot be accessed by a hardware emulator. External (Off-Chip) Memory Each of the ADSP-2196’s off-chip memory spaces has a separate control register, so applications can configure unique access parameters for each space. The access param- eters include read and write wait counts, waitstate completion mode, I/O clock divide ratio, write hold time extension, strobe polarity, and data bus width. The core clock and peripheral clock ratios influence the external memory access strobe widths. For more information, see Clock Signals on page 14. The off-chip memory spaces are: • External memory space (MS3–0 pins) • I/O memory space (IOMS pin) • Boot memory space (BMS pin) All of these off-chip memory spaces are accessible through the External Port, which can be configured for 8-bit or 16-bit data widths. External Memory Space External memory space consists of four memory banks. These banks can contain a configurable number of 64K word pages. At reset, the page boundaries for external memory have Bank0 containing pages 1 −63, Bank1 con- taining pages 64 −127, Bank2 containing pages 128−191, and Bank3 containing Pages 192 −254. The MS3–0 memory bank pins select Banks 3–0, respectively. The external memory interface decodes the 8 MSBs of the DSP program address to select one of the four banks. Both the ADSP-219x core and DMA-capable peripherals can access the DSP’s external memory space. I/O Memory Space The ADSP-2196 supports an additional external memory called I/O memory space. This space is designed to support simple connections to peripherals (such as data converters and external registers) or to bus interface ASIC data regis- ters. I/O space supports a total of 256K locations. The first 8K addresses are reserved for on-chip peripherals. The upper 248K addresses are available for external peripheral devices. The DSP’s instruction set provides instructions for accessing I/O space. These instructions use an 18-bit address that is assembled from an 8-bit I/O page (IOPG) register and a 10-bit immediate value supplied in the instruction. Both the ADSP-219x core and a Host (through the Host Port Interface) can access I/O memory space. Boot Memory Space Boot memory space consists of one off-chip bank with 254 pages. The BMS memory bank pin selects boot memory space. Both the ADSP-219x core and DMA-capable Figure 2. ADSP-2196 Memory Map %$1. 06 %$1. 06 %$1. 06 %$1. 06 5(6(59(' 5(6(59(' %227 520 %,7 [ [ [ [ [ [& [)) [)) ) [)) )))) $''5(66 [ $ [ . :25' 0(025< 3$*(6 3$*( 3$*(6 ± 3$*(6 ± 3$*(6 ± 3$*(6 ± 3$*( ,17(51$/ 0(025< ,17(51$/ 0(025< (;7(51$/ 0(025< %,7 5(6(59(' . 65$0 . 65$0 0(025< 6(/(&76 06 )25 3257,216 2) 7+( 0(025< 0$3 $33($5 :,7+ 7+( 6(/(&7(' 0(025< %227 0(025< %,7 %06 . :25' 3$*(6 ± [ [)( )))) ,2 0(025< %,7 . :25' 3$*(6 ± . :25' 3$*(6 ± /2:(5 3$*( %281'$5,(6 $5( &21),*85$%/( )25 %$1.6 2) (;7(51$/ 0(025< %281'$5,(6 6+2:1 $5( %$1. 6,=(6 $7 5(6(7 [ [ [ )))) $''5(66 $''5(66 ,17(51$/ (;7(51$/ ,206 |
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