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AK4133 Datenblatt(PDF) 15 Page - Asahi Kasei Microsystems |
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AK4133 Datenblatt(HTML) 15 Page - Asahi Kasei Microsystems |
15 / 29 page [AK4133] 015015325-E-02 2018/05 - 15 - 13. Functional Description ■ Input and Output sampling rate combination The table below shows the possible combination of the input sampling rate and output sampling rate. Table 1. Combinations of FSI and FSO FSI FSO [kHz] [kHz] 8 11.025 12 16 22.05 24 32 44.1 48 8 Y - - Y - Y - Y Y 11.025 - - - - - - - Y Y 12 - - - - - - - Y Y 16 Y - - Y - Y - Y Y 22.05 - - - - - - - Y Y 24 Y - - Y - Y - Y Y 32 - - - - - - - Y Y 44.1 - - - - - - - Y Y 48 - - - - - - - Y Y 88.2 - - - - - - - Y Y 96 - - - - - - - Y Y 176.4 - - - - - - - Y Y 192 - - - - - - - Y Y Y: Available -: Not Available ■ System Clock and Audio Interface Format for Input Port The audio interface format is controlled by the IDIF pin. The data format is MSB first in 2 ’s complement. The SDTI input data is clocked in on a rising edge of the IBICK. The audio interface format of the input port should be changed while the PDN pin = “L”. Table 2. Input PORT Audio Interface Format Mode IDIF Pin SDTI Format ILRCK IBICK IBICK Frequency 0 L 24-bit, MSB justified Input Input 256FSI or 64FSI 1 H 24 or 16-bit, I 2S Compatible 256FSI or 64FSI 16-bit, I 2S Compatible 32FSI (* 16) Note: * 16. When IBICK = 32FSI, only 16-bit I 2S Compatible is supported. |
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Ähnliche Beschreibung - AK4133 |
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