Datenblatt-Suchmaschine für elektronische Bauteile |
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SN74AVCH1T45YEPR Datenblatt(PDF) 2 Page - Texas Instruments |
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SN74AVCH1T45YEPR Datenblatt(HTML) 2 Page - Texas Instruments |
2 / 21 page SN74AVCH1T45 SINGLEBIT DUALSUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3STATE OUTPUTS SCES598C – JULY 2004 – REVISED OCTOBER 2004 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 description/ordering information (continued) This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The VCC isolation feature ensures that if either VCC input is at GND, then both outputs are in the high-impedance state. The bus-hold circuitry on the powered-up side always stays active. Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. NanoStar and NanoFree package technology is a major breakthrough in IC packaging concepts, using the die as the package. FUNCTION TABLE INPUT DIR OPERATION L B data to A bus H A data to B bus logic diagram (positive logic) B DIR 5 4 A 3 VCCA VCCB |
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