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ISO224 Datenblatt(PDF) 9 Page - Texas Instruments |
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ISO224 Datenblatt(HTML) 9 Page - Texas Instruments |
9 / 25 page IN OUTN OUTP 50% - 10% 12 V -12 V 50% - 50% 50% - 90% 10% 50% tr tf VCMout 90% 0 V 50% 9 ISO224 www.ti.com SBAS738 – JUNE 2018 Product Folder Links: ISO224 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated 7.10 Switching Characteristics over operating ambient temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT SR Slew rate On OUTP, OUTN 2 V/µs IN to OUTP, OUTN signal delay (50% – 10%) ISO224A, unfiltered output, see Figure 1 2.2 µs ISO224B, unfiltered output, see Figure 1 1.5 IN to OUTP, OUTN signal delay (50% – 50%) ISO224A, unfiltered output, see Figure 1 2.8 µs ISO224B, unfiltered output, see Figure 1 2.1 IN to OUTP, OUTN signal delay (50% – 90%) ISO224A, unfiltered output, see Figure 1 3.7 µs ISO224B, unfiltered output, see Figure 1 3 tAS Analog startup time VDD1 step to 4.5 V with VDD2 ≥ 4.5 V, to OUTP, OUTN valid, 0.1% settling 500 µs Figure 1. Delay Time Test Waveforms |
Ähnliche Teilenummer - ISO224 |
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Ähnliche Beschreibung - ISO224 |
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