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HSHCAL001B Datenblatt(PDF) 8 Page - ALPS ELECTRIC CO.,LTD.

Teilenummer HSHCAL001B
Bauteilbeschribung  Digtal Humidity Sensor
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Hersteller  ALPS [ALPS ELECTRIC CO.,LTD.]
Direct Link  http://www.alps.com
Logo ALPS - ALPS ELECTRIC CO.,LTD.

HSHCAL001B Datenblatt(HTML) 8 Page - ALPS ELECTRIC CO.,LTD.

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4-9-3.
レジスタの読込みと書き込み
Read and Write Resisters
-
レジスタ読み込み時の
I2C
の通信シーケンスは
2
種類
(Sequence 1, 2
参照
)
あり、
またレジスタ書き込み時
/
アクションコマンド発行時の
I2C
の通信シーケンスは
3
種類
(Sequence 3~5
参照
)
ある。
-
本製品は、連続したレジスタの複数データを、
1
回の通信で
Read/Write
を行うために、
Multi-Read/Write
機能を持つ。
この機能は、送受信処理毎に、内部レジスタアドレスを自動的に増加させる。
また、
I2C
通信時、レジスタアドレスの
MSB1
は常に
L(0)
とする。
-
通信時に、スレーブアドレスのかわりに、マスターコマンドを受信すると、
IC
NAK
を返信し、
HS
通信に切り替える。
 その後、
[Stop Condition]
を検出すると、
HS
通信を終了する。そのため、
HS
のままレジスタの
 
Read/multiple byte Read
等の連続通信を行う際には、マスター側の通信の区切りに、
[Repeated Start Condition]
を利用する必要がある。
HS
のスタートとエンドシーケンスは、
Sequence 6
を参照すること。
- There are two kinds of communication sequences when the Register is read.
(Refer to Sequence 1 and 2) There are three kinds of communication sequences when the
Register is written or sending acction comands (Refer to Sequence 3 to 5)
- This product has a Multi-Read/Write function, in order to perform Read/Write for two or more data of
continuous registers in one time communication. This function makes an internal register address
increment automatically for every communication process.
MSB1 of a register address must be Low (0).
- If a master command is received instead of a slave address at the time of communication,
the device will reply NAK and will change it to HS communication. Then, detection of [Stop Condition]
will end HS communication. Therefore, when performing continous communication of Read/multiple
byte Read of a register and etc, it is necessary to use [Repeated Start Condition] for a pause of
communication from master device. (Refer to Sequence 6)
Table 3. List of items
Item
Description
START
Start Condition
P&S|REST Stop Condition -> Start Condition or Repeated Start Condition
RESTART
Repeated Start Condition
SADR
Slave Address
MCODE
Master Code
R
Read Bit
W
Write Bit
ACK
Acknowledge
NAK
Not Acknowledge
RADR
Embedded Register Address
DATA
Read / Write Data
STOP
Stop Condition
AC
Action Command
Sequence 1. register Read (single byte)
START
RADR
SADR,R
STOP
ACK
ACK
ACK DATA
Sequence 2. register Read (multiple byte)
START
RADR
SADR,R
ACK
….
ACK|NAK
STOP
ACK
ACK
ACK DATA(1)
….
DATA(N)
Sequence 3. register Write (single byte)
START
RADR
DATA
STOP
ACK
ACK
ACK
Sequence 4. register Write (multiple byte)
START
RADR
DATA(1)
….
DATA(N)
STOP
ACK
ACK
ACK
….
ACK
Sequence 5. ACtion Command
START
AC
STOP
ACK
ACK
Sequence 6. Higt Speed Mode
START
RESTART
….
STOP START
….
NAK
ACK ….
FS
Slave
ACK|NAK
Mode
FS
HS
Master
MCODE
SADR,R|W
ACK|NAK
Master
SADR,W
Slave
Master
SADR,W
Slave
Master
SADR,W
Slave
Master
SADR,W
P&S|REST
Slave
Slave
Master
SADR,W
P&S|REST
ACK|NAK


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