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SN74AUC16373 Datenblatt(PDF) 1 Page - Texas Instruments

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Teilenummer SN74AUC16373
Bauteilbeschribung  16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS
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Hersteller  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

SN74AUC16373 Datenblatt(HTML) 1 Page - Texas Instruments

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FEATURES
DESCRIPTION/ORDERING INFORMATION
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1OE
1Q1
1Q2
GND
1Q3
1Q4
VCC
1Q5
1Q6
GND
1Q7
1Q8
2Q1
2Q2
GND
2Q3
2Q4
VCC
2Q5
2Q6
GND
2Q7
2Q8
2OE
1LE
1D1
1D2
GND
1D3
1D4
VCC
1D5
1D6
GND
1D7
1D8
2D1
2D2
GND
2D3
2D4
VCC
2D5
2D6
GND
2D7
2D8
2LE
DGG OR DGV PACKAGE
(TOP VIEW)
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or
SN74AUC16373
16-BIT TRANSPARENT D-TYPE LATCH
WITH 3-STATE OUTPUTS
SCES401C – JULY 2002 – REVISED JUNE 2005
Member of the Texas Instruments Widebus™
Family
Optimized for 1.8-V Operation and Is 3.6-V I/O
Tolerant to Support Mixed-Mode Signal
Operation
Ioff Supports Partial-Power-Down Mode
Operation
Sub-1-V Operable
Max tpd of 2 ns at 1.8 V
Low Power Consumption, 20-
µA Max I
CC
±8-mA Output Drive at 1.8 V
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
This 16-bit transparent D-type latch is operational at
0.8-V to 2.7-V VCC, but is designed specifically for
1.65-V to 1.95-V VCC operation.
The
SN74AUC16373
is
particularly
suitable
for
implementing buffer registers, I/O ports, bidirectional
bus drivers, and working registers. The device can be
used as two 8-bit latches or one 16-bit latch. When
the latch-enable (LE) input is high, the Q outputs
follow the data (D) inputs. When LE is taken low, the
Q outputs are latched at the levels set up at the D
inputs.
low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the
bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines
without interface or pullup components.
OE does not affect internal operations of the latch. Old data can be retained or new data can be entered while
the outputs are in the high-impedance state.
ORDERING INFORMATION
TA
PACKAGE(1)
ORDERABLE PART NUMBER
TOP-SIDE MARKING
TSSOP - DGG
Tape and reel
SN74AUC16373DGGR
AUC16373
–40°C to 85°C
TVSOP - DGV
Tape and reel
SN74AUC16373DGVR
MH373
VFBGA - GQL
Tape and reel
SN74AUC16373GQLR
MH373
(1)
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 2002–2005, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.


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