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AD5231BRU50-REEL7 Datenblatt(PDF) 11 Page - Analog Devices |
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AD5231BRU50-REEL7 Datenblatt(HTML) 11 Page - Analog Devices |
11 / 14 page PRELIMINARY TECHNICAL DATA Nonvolatile Memory Digital Potentiometers AD5231/AD5232/AD5233 REV PrF 11 22 MAR '01 Information contained in this Preliminary data sheet describes a product in the early definition stage. There is no guarantee that the information contained here will become a final product in its present form. For latest information contact Walt Heinzer/Analog Devices, Santa Clara, CA. TEL(408)382-3107; FAX (408)382-2708; walt.heinzer@analog.com Table 5. AD5233 Instruction/Operation Truth Table Inst No. Instruction Byte 1 B15 •••••••••••••••• B8 Data Byte 0 B7 ••••••••••••••••• B0 Operation C3 C2 C1 C0 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 0 0 0 0 0 X X X X X X X X X X X X No Operation (NOP): Do nothing 1 0 0 0 1 << ADDR >> X X X X X X X X Write contents of EEMEM(ADDR) to RDAC(ADDR) Register 2 0 0 1 0 << ADDR >> X X X X X X X X SAVE WIPER SETTING: Write contents of RDAC(ADDR) to EEMEM(ADDR) 3 0 0 1 1 << ADDR >> D7 D6 D5 D4 D3 D2 D1 D0 Write contents of Serial Register Data Byte 0 to EEMEM(ADDR) 4 0 1 0 0 << ADDR >> X X X X X X X X Decrement 6dB: Right Shift contents of RDAC(ADDR), stops at all "Zeros". 5 0 1 0 1 X X X X X X X X X X X X Decrement All 6dB: Right Shift contents of all RDAC Registers, stops at all "Zeros". 6 0 1 1 0 << ADDR >> X X X X X X X X Decrement contents of RDAC(ADDR) by "One", stops at all "Zeros". 7 0 1 1 1 X X X X X X X X X X X X Decrement contents of all RDAC Registers by "One", stops at all "Zeros". 8 1 0 0 0 0 0 0 0 X X X X X X X X RESET: Load all RDACs with their corresponding EEMEM previously-saved values 9 1 0 0 1 << ADDR >> X X X X X X X X Write contents of EEMEM(ADDR) to Serial Register Data Byte 0 10 1 0 1 0 << ADDR >> X X X X X X X X Write contents of RDAC(ADDR) to Serial Register Data Byte 0 11 1 0 1 1 << ADDR >> D7 D6 D5 D4 D3 D2 D1 D0 Write contents of Serial Register Data Byte 0 to RDAC(ADDR) 12 1 1 0 0 << ADDR >> X X X X X X X X Increment 6dB: Left Shift contents of RDAC(ADDR), stops at all "Ones". 13 1 1 0 1 X X X X X X X X X X X X Increment All 6dB: Left Shift contents of all RDAC Registers, stops at all "Ones". 14 1 1 1 0 << ADDR >> X X X X X X X X Increment contents of RDAC(ADDR) by "One", stops at all "Ones". 15 1 1 1 1 X X X X X X X X X X X X Increment contents of all RDAC Registers by "One", stops at all "Ones". NOTES: 1. The SDO output shifts-out the last 8-bits of data clocked into the serial register for daisy chain operation. Exception: following Instruction #9 or #10 the selected internal register data will be present in data byte 0. Instructions following #9 & #10 must be a full 16-bit data word to completely clock out the contents of the serial register. The wiper only has 64 positions that correspond to the lower 6-bits of register data. 2. The RDAC register is a volatile scratch pad register that is refreshed at power ON from the corresponding non-volatile EEMEM register. 3. The increment, decrement and shift commands ignore the contents of the shift register Data Byte 0. 4. Execution of the Operation column noted in the table takes place when the CS strobe returns to logic high. |
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