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DAC-12100LE Datenblatt(PDF) 1 Page - DATEL, Inc.

Teilenummer DAC-12100LE
Bauteilbeschribung  12-Bit, 100MHz, Low-Power D/A Converters
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Hersteller  DATEL [DATEL, Inc.]
Direct Link  http://www.datel.com/
Logo DATEL - DATEL, Inc.

DAC-12100LE Datenblatt(HTML) 1 Page - DATEL, Inc.

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DATEL, Inc. 11 Cabot Boulevard, Mansfield, MA 02048-1151 USA • Tel: (508) 339-3000 • www.datel.com • e-mail: help@datel.com
FEATURES
100MHz conversion rate
Low power, 650mW, typical
Low glitch energy, 3.0pV-s
Excellent dynamic specifications
TTL/CMOS compatible inputs
20ns settling time
Packaged in a hermetic ceramic LCC package
(0.450 X 0.450 inches)
Standard versions come with solder dipped leads
Low cost
Models available in commercial (0 to + 70°C), indus-
trial (–40 to +100°C), or military (–55 to +125°C)
operating temperature ranges
Full 883 and LM/QL versions available
If needed a ROHS version is available
DAC-12100
12-Bit, 100MHz, Low-Power D/A Converters
26 Jun 2015 MDA_DAC-12100.B03 Page 1 of 7
PRODUCT OVERVIEW
The DAC-12100 is a 12-bit, ultra high speed, current
output digital-to-analog converter. This TTL/CMOS
compatible device converts at a rate of 100MHz
and features a 3.0 pV-s glitch energy and excellent
frequency domain specifications. The DAC-12100
develops complementary current outputs of 0 to
–20.48mA and can directly drive 50 Ohm loads.
The excellent dynamic specifications (to Nyquist at
fOUT=2.02MHz) include an SFDR of –85dB. Static
performance includes maximum over temperature
specifications of +/- 1.75LSB and +/-1LSB for
integral and differential nonlinearity, respectively.
The DAC-12100 achieves low power and high speed
performance from an advanced BiCMOS process.
The architecture employs an R/2R resistor network
and a segmented switching current cell arrange-
ment to reduce glitch. Laser trimming assures that
12-bit linearity is achieved and maintained over the
transfer curve. It also incorporates a 12-bit input
data register and bandgap voltage reference with a
buffer amplifier.
The DAC-12100 runs on +5V and –5.2V supplies
and dissipates a maximum of 800mW. It is avail-
able in a 28-pin CLCC solder dipped leads package
with an operating temperature range of 0 to 70°C
and –55 to +125°C. If needed a RoHS version is
available upon request.
FUNCTIONAL BLOCK DIAGRAM
Data Clock 26
12-BIT
MASTER
REGISTER
CTRL
IN
UPPER
4-BIT
DECODER
OVERDRIVEABLE
VOLTAGE
REFERENCE
20
REF OUT
RSET
IOUT
25
Ω
DATA
BUFFER
LEVEL
SHIFTER
SLAVE
REGISTER
15
SWITCHED
CURRENT
CELLS
REF CELL
R/ 2R
NETWORK
+
CTRL
OUT
BIT 1 ( MSB)
BIT 2
BIT 3
BIT 4
BIT 5
BIT 6
BIT 7
BIT 8
BIT 9
BIT 10
BIT 11
BIT 12 (LSB)
8 LSBs
CURRENT
CELLS
28
1
2
3
4
5
6
7
8
9
10
11
14
16
19
18
24
RefGND 22
27
DGND
13
AGND
15,25
–5.2V
ANALOG
SUPPLY
23
+5V SUPPLY
12,21
–5.2V
DIGITAL
SUPPLY
IOUT
17 Ref In
Figure 1. Functional Block Diagram


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