7 x 7 VFBGA Package Information
BC352239A-ds-001Pc
© Cambridge Silicon Radio Limited 2004
Production Information
Page 11 of 116
PIO Port
Ball
Pad Type
Description
PIO[11]
A3
Bi-directional with
programmable strength
internal pull-up/down
Programmable input/output line
PIO[10]
B3
Bi-directional with
programmable strength
internal pull-up/down
Programmable input/output line
PIO[9]
C3
Bi-directional with
programmable strength
internal pull-up/down
Programmable input/output line
PIO[8]
D3
Bi-directional with
programmable strength
internal pull-up/down
Programmable input/output line
PIO[7]/UART_RX
(1)/
CLK_OUT
G11
Bi-directional with
programmable strength
internal pull-up/down
Programmable input/output line or
programmable frequency clock output
PIO[6]/CLK_REQ/
UART_CTS
(1)
F13
Bi-directional with
programmable strength
internal pull-up/down
PIO line or clock request output to enable
external clock for external clock line
PIO[5]/USB_DETACH/
UART_RTS
(1)
F11
Bi-directional with
programmable strength
internal pull-up/down
PIO line or chip detaches from USB when
this input is high
PIO[4]/USB_ON/
UART_TX
(1)
F12
Bi-directional with
programmable strength
internal pull-up/down
PIO or USB on (input senses when VBUS is
high, wakes BlueCore3-Multimedia
External)
PIO[3]/USB_WAKE_UP/
HOST_CLK_REQ
B2
Bi-directional with
programmable strength
internal pull-up/down
PIO or output goes high to wake up PC
when in USB mode or clock request input
from host controller
PIO[2]/CLK_REQ
C2
Bi-directional with
programmable strength
internal pull-up/down
PIO or external clock request
AIO[0]
N3
Bi-directional
Programmable input/output line
AIO[1]
L4
Bi-directional
Programmable input/output line
AIO[2]
M4
Bi-directional
Programmable input/output line
AIO[3]
N4
Bi-directional
Programmable input/output line
Test and Debug
Ball
Pad Type
Description
RESET
B12
CMOS input with weak
internal pull-down
Reset if high. Input debounced so must be
high for >5ms to cause a reset
RESETB
E12
CMOS input with weak
internal pull-up
Reset if low. Input debounced so must be
low for >5ms to cause a reset
SPI_CSB
C11
CMOS input with weak
internal pull-up
Chip select for Synchronous Serial Interface
active low
SPI_CLK
C13
CMOS input with weak
internal pull-down
Serial Peripheral Interface clock
SPI_MOSI
D12
CMOS input with weak
internal pull-down
Serial Peripheral Interface data input
SPI_MISO
B13
CMOS output, tri-state, with
weak internal pull-down
Serial Peripheral Interface data output
TEST_EN
B11
CMOS input with strong
internal pull-down
For test purposes only (leave unconnected)
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