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KMM372V410CK Datenblatt(PDF) 4 Page - Samsung semiconductor

Teilenummer KMM372V410CK
Bauteilbeschribung  4M x 72 DRAM DIMM with ECC using 4Mx4, 4K 2K Refresh, 3.3V
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Hersteller  SAMSUNG [Samsung semiconductor]
Direct Link  http://www.samsung.com/Products/Semiconductor
Logo SAMSUNG - Samsung semiconductor

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DRAM MODULE
KMM372V410CK/CS
KMM372V400CK/CS
CAPACITANCE (TA = 25
°C, Vcc=3.3V, f = 1MHz)
Item
Symbol
Min
Max
Unit
Input capacitance[A0-A11(A10), B0]
Input capacitance[W0, W2, OE0, OE2]
Input capacitance[RAS0 , RAS2]
Input capacitance[CAS0 , CAS4]
Input/Output capacitance[DQ0 - 71]
CIN1
CIN2
CIN3
CIN4
CDQ1
-
-
-
-
-
20
20
80
20
20
pF
pF
pF
pF
pF
AC CHARACTERISTICS (0
°C≤TA≤70°C, VCC=3.3V±0.3V. See notes 1,2.)
Test condition : Vih/Vil=2.0/0.8V, Voh/Vol=2.0/0.8V, Output loading CL=100pF
Parameter
Symbol
-5
-6
Unit
Note
Min
Max
Min
Max
Random read or write cycle time
tRC
90
110
ns
Read-modify-write cycle time
tRWC
133
155
ns
Access time from RAS
tRAC
50
60
ns
3,4
Access time from CAS
tCAC
18
20
ns
3,4,5,11
Access time from column address
tAA
30
35
ns
3,10,11
CAS to output in Low-Z
tCLZ
5
5
ns
3,11
Output buffer turn-off delay
tOFF
5
18
5
20
ns
6,11
Transition time(rise and fall)
tT
2
50
3
50
ns
2
RAS precharge time
tRP
30
40
ns
RAS pulse width
tRAS
50
10K
60
10K
ns
RAS hold time
tRSH
18
20
ns
11
CAS hold time
tCSH
48
58
ns
11
CAS pulse width
tCAS
13
10K
15
10K
ns
RAS to CAS delay time
tRCD
18
32
18
40
ns
4,11
RAS to column address delay time
tRAD
13
20
13
25
ns
10,11
CAS to RAS precharge time
tCRP
10
10
ns
11
Row address set-up time
tASR
5
5
ns
11
Row address hold time
tRAH
8
8
ns
11
Column address set-up time
tASC
0
0
ns
Column address hold time
tCAH
10
10
ns
Column address to RAS lead time
tRAL
30
35
ns
11
Read command set-up time
tRCS
0
0
ns
Read command hold referenced to CAS
tRCH
0
0
ns
8
Read command hold referenced to RAS
tRRH
-2
-2
ns
8,11
Write command hold time
tWCH
10
10
ns
Write command pulse width
tWP
10
10
ns
Write command to RAS lead time
tRWL
18
20
ns
11
Write command to CAS lead time
tCWL
13
15
ns
Data set-up time
tDS
-2
-2
ns
9,11
Data hold time
tDH
15
20
ns
9,11
Refresh period (4K refresh)
tREF
64
64
ms
Refresh period (2K refresh)
tREF
32
32
ms
Write command set-up time
tWCS
0
0
ns
7
CAS to W dealy time
tCWD
36
40
ns
7
Column address to W delay time
tAWD
48
55
ns
7


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