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MC100LVEL51DR2 Datenblatt(PDF) 2 Page - ON Semiconductor

Teilenummer MC100LVEL51DR2
Bauteilbeschribung  Differential Clock D Flip-Flop
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MC100LVEL51DR2 Datenblatt(HTML) 2 Page - ON Semiconductor

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MC100LVEL51
MOTOROLA
ECLinPS and ECLinPS Lite
DL140 — Rev 3
4–2
DC CHARACTERISTICS (VEE = VEE(min) to VEE(max); VCC = GND)
–40
°C
0
°C
25
°C
85
°C
Symbol
Characteristic
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
IEE
Power Supply Current
30
35
30
35
30
35
32
37
mA
VEE
Power Supply Voltage
–3.0
–3.3
–3.8
–3.0
–3.3
–3.8
–3.0
–3.3
–3.8
–3.0
–3.3
–3.8
V
IIH
Input HIGH Current
150
150
150
150
µA
IIL
Input LOW Current CLK
Other
–600
0.5
–600
0.5
–600
0.5
–600
0.5
µA
AC CHARACTERISTICS (VEE = VEE(min) to VEE(max); VCC = GND)
–40
°C
0
°C
25
°C
85
°C
Symbol
Characteristic
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
fMAX
Maximum Toggle
Frequency
2.7
2.9
2.9
2.9
GHz
tPLH
tPHL
Propagation Delay
to Output
CLK
R
330
340
510
540
330
340
510
540
340
350
520
550
370
390
550
590
ps
tS
Setup Time
150
0
150
0
150
0
150
0
ps
tH
Hold Time
200
100
200
100
200
100
200
100
ps
tRR
Reset Recovery
350
200
350
200
350
200
350
200
ps
tPW
Minimum Pulse
CLK
Width
Reset
400
500
400
500
400
500
400
500
ps
VPP
Minimum Input Swing1
150
150
150
150
mV
VCMR
Common Mode Range2
VPP < 500mV
VPP ≥ 500mV
–2.0
–1.8
–0.4
–0.4
–2.1
–1.9
–0.4
–0.4
–2.1
–1.9
–0.4
–0.4
–2.1
–1.9
–0.4
–0.4
V
tr
tf
Output Rise/Fall Times Q
(20% – 80%)
120
320
120
320
120
320
120
320
ps
1. Minimum input swing for which AC parameters are guaranteed.
2. The CMR range is referenced to the most positive side of the differential input signal. Normal operation is obtained if the HIGH level falls within
the specified range and the peak-to-peak voltage lies between VPPmin and 1V. The lower end of the CMR range varies 1:1 with VEE. The
numbers in the spec table assume a nominal VEE = –3.3V. Note for PECL operation, the VCMR(min) will be fixed at 3.3V – |VCMR(min)|.


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