Datenblatt-Suchmaschine für elektronische Bauteile |
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74AUP1G125DRLRG4 Datenblatt(PDF) 2 Page - Texas Instruments |
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74AUP1G125DRLRG4 Datenblatt(HTML) 2 Page - Texas Instruments |
2 / 15 page www.ti.com DESCRIPTION/ORDERING INFORMATION (CONTINUED) LOGIC DIAGRAM (POSITIVE LOGIC) A Y OE 1 2 4 SN74AUP1G125 LOW-POWER SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT SCES595E – JULY 2004 – REVISED JULY 2005 This bus buffer gate is a single line driver with a 3-state output. The output is disabled when the output-enable (OE) input is high. This device has the input-disable feature, which allows floating input signals. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. ORDERING INFORMATION TA PACKAGE(1) ORDERABLE PART NUMBER TOP-SIDE MARKING(2) NanoStar™ – WCSP (DSBGA) SN74AUP1G125YEPR 0.23-mm Large Bump – YEP Reel of 3000 _ _ _ HM _ NanoStar™ – WCSP (DSBGA) 0.23-mm Large Bump – YZP SN74AUP1G125YZPR (Pb-free) –40 °C to 85°C Reel of 3000 SN74AUP1G125DBVR SOT (SOT-23) – DBV H25_ Reel of 250 SN74AUP1G125DBVT Reel of 3000 SN74AUP1G125DCKR SOT (SC-70) – DCK Reel of 250 SN74AUP1G125DCKT HM_ SOT (SOT-553) – DRL Reel of 4000 SN74AUP1G125DRLR (1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. (2) DBV/DCK/DRL: The actual top-side marking has one additional character that designates the assembly/test site. YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free). FUNCTION TABLE INPUTS OUTPUT Y OE A L H H L L L H X(1) Z (1) Floating inputs allowed. 2 |
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