KMM5361203C2WG datasheet(7/17 Pages) SAMSUNG

Teilenummer	KMM5361203C2WG

Bauteilbeschribung	1M x 36 DRAM SIMM using 1Mx16 and 1Mx4 Quad CAS, 1K Refresh

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Hersteller	SAMSUNG [Samsung semiconductor]

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DRAM MODULE

KMM5361203C2W/C2WG

Rev. 0.0 (Nov. 1997)

- 7 -

NOTES

An initial pause of 200us is required after power-up followed

by any 8 RAS-only or CAS-before-RAS refresh cycles before

proper device operation is achieved.

VIH(min) and VIL(max) are reference levels for measuring

timing of input signals. Transition times are measured

between VIH(min) and VIL(max) and are assumed to be 5ns

for all inputs.

Measured with a load equivalent to 2 TTL loads and 100pF.

Operation within the

tRCD(max) limit insures that tRAC(max)

can be met.

tRCD(max) is specified as a reference point only.

If

tRCD is greater than the specified tRCD(max) limit, then

access time is controlled exclusively by

tCAC.

Assumes that

tRCD

≥tRCD(max).

This parameter defines the time at which the output achieves

the open circuit condition and is not referenced to V OH or

VOL.

tWCS is non-restrictive operating parameter. It is included in

the

data

sheet

as

electrical

characteristic s

only.

If

tWCS

≥tWCS(min), the cycle is an early write cycle and the

data out pin will remain high impedance for the duration of

the cycle.

Either

tRCH or tRRH must be satisfied for a read cycle.

These parameter are referenced to the CAS leading edge in

early write cycles.

Operation within the

tRAD(max) limit insures that tRAC(max)

can be met.

tRAD(max) is specified as reference point only. If

tRAD is greater than the specified tRAD(max) limit, then

access time is controlled by

tAA.

In order to hold the address latched by the first CAS going

low, the parameter

tCLCH must be met.

1.

2.

3.

4.

5.

6.

7.

8.

9.

10.

Test condition : Vih/Vil=2.4/0.8V, Voh/Vol=2.4/0.4V, Output loading CL=100pF

Parameter

Symbol

-5

-6

Unit

Note

Min

Max

Min

Max

Fast page mode cycle time

tPC

35

40

ns

CAS precharge time(Fast page cycle)

tCP

10

ns

RAS pulse width(Fast page cycle)

tRASP

50

200K

60

200K

ns

W to RAS precharge time(C-B-R refresh)

tWRP

10

ns

W to RAS hold time(C-B-R refresh)

tWRH

10

ns

Hold time CAS low to CAS

tCLCH

20

5

ns

11

AC CHARACTERISTICS (0

°C≤TA≤70°C, VCC=5.0V±10%. See notes 1,2.)

11.

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