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CS5504 Datenblatt(PDF) 11 Page - Cirrus Logic

Teilenummer CS5504
Bauteilbeschribung  Low Power, 20-Bit A/D Converter
Download  24 Pages
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Hersteller  CIRRUS [Cirrus Logic]
Direct Link  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS5504 Datenblatt(HTML) 11 Page - Cirrus Logic

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output code. The only difference is that in bipo-
lar mode the on-chip microcontroller offsets the
computed output word by a code value of
8000H.
This means that the bipolar measure-
ment range is not calibrated from full scale
positive to full scale negative. Instead it is cali-
brated from the bipolar zero scale point to full
scale positive. The slope factor is then extended
below bipolar zero to accommodate the negative
input signals. The converter can be used to con-
vert both unipolar and bipolar signals by
changing the BP/UP pin. Recalibration is not re-
quired when switching between unipolar and
bipolar modes.
At the end of the calibration cycle, the on-chip
micro controller checks the logic state of the
CONV signal. If the CONV input is low the de-
vice will enter the standby mode where it waits
for further instruction. If the CONV signal is
high at the end of the calibration cycle, the con-
verter will enter the conversion state and
perform a conversion on the input channel. The
CAL signal can be returned low any time after
calibration is initiated.
CONV can also be re-
turned low, but it should never be taken low and
then taken back high until the calibration period
has ended and the converter is in the standby
state.
If CONV is taken low and then high
again with CAL high while the converter is cali-
brating, the device will interrupt the current
calibration cycle and start a new one. If CAL is
taken low and CONV is taken low and then high
during calibration, the calibration cycle
will
continue as the conversion command is disre-
garded. The state of BP/UP is not important
during calibrations.
If an "end of calibration" signal is desired, pulse
the CAL signal high while leaving the CONV
signal high continuously. Once the calibration is
completed, a conversion will be performed. At
the end of the conversion, DRDY will fall to in-
dicate the first valid conversion after the
calibration has been completed.
Conversion
The conversion state can be entered at the end of
the calibration cycle, or whenever the converter
is idle in the standby mode. If CONV is taken
high to initiate a calibration cycle ( CAL also
high), and remains high until the calibration cy-
cle is completed (CAL is taken low after CONV
transitions high), the converter will begin a con-
version upon completion of the calibration
period. The device will perform a conversion on
the input channel selected by A0 when CONV
transitions high.
Table 1 indicates the multi-
plexer channel selection truth table.
The A0 input is latched internal to the CS5504
when CONV rises.
A0 has internal pull-down
circuits which default the multiplexer to channel
AIN1.
The BP/UP pin is not a latched input. The
BP/UP pin controls how the output word from
the digital filter is processed. In bipolar mode
the output word computed by the digital filter is
offset by 80000H (see Understanding Converter
Calibration). BP/UP can be changed after a con-
version is started as long as it is stable for 82
clock cycles of the conversion period prior to
DRDY falling. If one wishes to intermix meas-
urement of bipolar and unipolar signals on
various input channels, it is best to switch the
BP/UP pin immediately after DRDY falls and
leave BP/UP stable until DRDY falls again.
The digital filter in the CS5504 has a Finite Im-
pulse Response and is designed to settle to full
accuracy in one conversion time.
If CONV is left high, the CS5504 will perform
continuous conversions. The conversion time
will be 1622 clock cycles. If conversion is initi-
A0
Channel Addressed
0AIN1
1AIN2
Table 1. Multiplexer Truth Table
CS5504
DS126F1
11
CS5504
DS126F2
11


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