Datenblatt-Suchmaschine für elektronische Bauteile |
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L6258EP Datenblatt(PDF) 8 Page - STMicroelectronics |
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L6258EP Datenblatt(HTML) 8 Page - STMicroelectronics |
8 / 22 page L6258EP 8/22 3.3 Phase Input ( PH ) The logic level applied to this input determines the direction of the current flowing in the winding of the motor. High level on the phase input causes the motor current flowing from OUT_A to OUT_B through the load. 3.4 Triangular Generator This circuit generates the two triangular waves TRI_0 and TRI_180 internally used to generate the duty cycle variation of the signals driving the output stage in bridge configuration. The frequency of the triangular wave defines the switching frequency of the output, and can be adjusted by changing the capacitor connected at TR1_CAP pin : where : K = 1.5 x 10-5 3.5 Charge Pump Circuit To ensure the correct driving of the high side drivers a voltage higher than Vs is supplied on the Vboot pin. This boostrap voltage is not needed for the low side power DMOS transistors because their sources terminals are grounded. To produce this voltage a charge pump method is used. It is made by using two external capacitors; one connected to the internal oscillator (CP) and the other (Cboot) to storage the overvoltage needed for the driving the gates of the high side DMOS. The value suggested for the capacitors are: Table 6. 3.6 Current Control LOOP The current control loop is a transconductance amplifier working in PWM mode. The motor current is a function of the programmed DAC voltage. To keep under control the output current, the current control modulates the duty cycle of the two outputs OUT_A and OUT_B, and a sensing resistor Rs is connected in series with the motor winding in order to produce a volt- age feedback compared with the programmed voltage of the DAC . The duty cycle modulation of the two outputs is generated comparing the voltage at the outputs of the error am- plifier, with the two triangular wave references . In order to drive the output bridge with the duty cycle modulation explained before, the signals driving each out- put ( OUTA & OUTB ) are generated by the use of the two comparators having as reference two triangular wave signals Tri_0 and Tri_180 of the same amplitude, the same average value (in our case Vr), but with a 180° of phase shift each other. The two triangular wave references are respectively applied to the inverting input of the first comparator and to the non inverting input of the second comparator. The other two inputs of the comparators are connected together to the error amplifier output voltage resulting by the difference between the programmed DAC. The reset of the comparison between the mentioned signals is shown in fig. 6. Cboot Storage Capacitor 100 nF CP PumpCapacitor 10 nF F ref K C ---- = |
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