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LMK61E08 Datenblatt(PDF) 15 Page - Texas Instruments |
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LMK61E08 Datenblatt(HTML) 15 Page - Texas Instruments |
15 / 54 page Output Control Power Conditioning VDD od EEPROM Registers od SCL SDA od = open-drain PLL VCO: 4.6 GHz ~ 5.6 GHz ¥ 10 nF Device Control Integrated Oscillator XO N Div ™û fractional Integer Div GND R Div /1, /4 Doubler x1, x2 OUTP OUTN Copyright © 2017, Texas Instruments Incorporated 15 LMK61E08 www.ti.com SNAS805 – JUNE 2020 Submit Documentation Feedback Copyright © 2020, Texas Instruments Incorporated 8 Detailed Description 8.1 Overview The LMK61E08 is a programmable oscillator family that generates commonly used reference clocks. LMK61E08 supports differential outputs with less than 200 fs, rms max random jitter in integer PLL mode and less than 300 fs, rms max random jitter in fractional PLL mode. 8.2 Functional Block Diagram NOTE Control blocks are compatible with 1.8-V, 2.5-V, and 3.3-V I/O voltage levels. |
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