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MC68HC05BD3 Datenblatt(PDF) 10 Page - Motorola, Inc |
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MC68HC05BD3 Datenblatt(HTML) 10 Page - Motorola, Inc |
10 / 112 page MOTOROLA ii MC68HC05BD3 Paragraph Number Page Number TITLE 4 RESETS AND INTERRUPTS 4.1 RESETS ................................................................................................................4-1 4.1.1 Power-On Reset (POR) ...................................................................................4-1 4.1.2 RESET Pin.......................................................................................................4-1 4.1.3 Illegal Address (ILADR) Reset.........................................................................4-2 4.1.4 Computer Operating Properly (COP) Reset ....................................................4-2 4.2 INTERRUPTS........................................................................................................4-3 4.2.1 Non-maskable Software Interrupt (SWI) ..........................................................4-3 4.2.2 Maskable Hardware Interrupts.........................................................................4-5 4.2.2.1 External Interrupt (IRQ)..............................................................................4-5 4.2.2.2 Sync Signal Processor Interrupt.................................................................4-7 4.2.2.3 M-Bus Interrupts.........................................................................................4-7 4.2.2.4 Multi-Function Timer Interrupts ..................................................................4-8 5 MULTI-FUNCTION TIMER 5.1 MFT Counter Register ...........................................................................................5-1 5.2 MFT Control and Status Register ..........................................................................5-1 5.3 COP Watchdog......................................................................................................5-2 6 PULSE WIDTH MODULATION 6.1 PWM Registers .....................................................................................................6-1 6.2 General Operation .................................................................................................6-1 7 M-BUS SERIAL INTERFACE 7.1 M-Bus Interface Features ......................................................................................7-1 7.2 M-Bus Protocol ......................................................................................................7-2 7.2.1 START Signal...................................................................................................7-3 7.2.2 Slave Address Transmission ............................................................................7-3 7.2.3 Data Transfer....................................................................................................7-4 7.2.4 Repeated START Signal ..................................................................................7-4 7.2.5 STOP Signal ....................................................................................................7-4 7.2.6 Arbitration Procedure .......................................................................................7-4 7.2.7 Clock Synchronization .....................................................................................7-5 7.2.8 Handshaking....................................................................................................7-5 7.3 M-Bus Registers ....................................................................................................7-5 TPG 8 Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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