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KM6161002B-10 Datenblatt(PDF) 2 Page - Samsung semiconductor

Teilenummer KM6161002B-10
Bauteilbeschribung  64Kx16 Bit High Speed Static RAM(5.0V Operating), Revolutionary Pin out.
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Hersteller  SAMSUNG [Samsung semiconductor]
Direct Link  http://www.samsung.com/Products/Semiconductor
Logo SAMSUNG - Samsung semiconductor

KM6161002B-10 Datenblatt(HTML) 2 Page - Samsung semiconductor

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KM6161002B, KM6161002BI
CMOS SRAM
Rev 2.0
- 2 -
February 1998
PIN FUNCTION
Pin Name
Pin Function
A0 - A15
Address Inputs
WE
Write Enable
CS
Chip Select
OE
Output Enable
LB
Lower-byte Control(I/O 1~I/O8)
UB
Upper-byte Control(I/O 9~I/O16)
I/O1 ~ I/O16
Data Inputs/Outputs
VCC
Power(+5.0V)
VSS
Ground
N.C
No Connection
64K x 16 Bit High-Speed CMOS Static RAM
The KM6161002B is a 1,048,576-bit high-speed Static Random
Access Memory organized as 65,536 words by 16 bits. The
KM6161002B uses 16 common input and output lines and has
at output enable pin which operates faster than address access
time at read cycle. Also it allows that lower and upper byte
access by data byte control ( UB, LB). The device is fabricated
using SAMSUNG
′s advanced CMOS process and designed for
high-speed circuit technology. It is particularly well suited for
use in high-density high-speed system applications. The
KM6161002B is packaged in a 400mil 44-pin plastic SOJ or
TSOP2 forward.
GENERAL DESCRIPTION
FEATURES
• Fast Access Time 8,10,12ns(Max.)
• Low Power Dissipation
Standby (TTL)
: 50 mA(Max.)
(CMOS) : 10 mA(Max.)
Operating KM6161002B - 8 : 200 mA(Max.)
KM6161002B - 10 : 195 mA(Max.)
KM6161002B - 12 : 190 mA(Max.)
• Single 5.0V
±10% Power Supply
• TTL Compatible Inputs and Outputs
• I/O Compatible with 3.3V Device
• Fully Static Operation
- No Clock or Refresh required
• Three State Outputs
• Center Power/Ground Pin Configuration
• Data Byte Control : LB : I/O1~ I/O8, UB : I/O9~ I/O16
• Standard Pin Configuration
KM6161002BJ : 44-SOJ-400
KM6161002BT : 44-TSOP2-400F
Clk Gen.
I/O1~I/O8
OE
UB
CS
PIN CONFIGURATION (Top View)
SOJ/
FUNCTIONAL BLOCK DIAGRAM
TSOP2
Data
Cont.
Column Select
A10 A11 A12 A13 A14 A15
CLK
Gen.
Pre-Charge Circuit
Memory Array
256 Rows
256x16 Columns
I/O Circuit &
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
A15
A14
A13
OE
UB
LB
I/O16
I/O15
I/O14
I/O13
Vss
Vcc
I/O12
I/O11
I/O10
I/O9
N.C.
A12
A11
A10
A9
N.C.
A0
A1
A2
A3
A4
CS
I/O1
I/O2
I/O3
I/O4
Vcc
Vss
I/O5
I/O6
I/O7
I/O8
WE
A5
A6
A7
A8
N.C.
A0
I/O9~I/O16
Data
Cont.
WE
LB
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
KM6161002B -8/10/12
Commercial Temp.
KM6161002BI -8/10/12
Industrial Temp.
ORDERING INFORMATION
A1
A2
A3
A4
A5
A6
A7
A8 A9


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