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54ABT373CSCQB Datenblatt(PDF) 5 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Teilenummer 54ABT373CSCQB
Bauteilbeschribung  Octal Transparent Latch with TRI-STATE Outputs
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54ABT373CSCQB Datenblatt(HTML) 5 Page - National Semiconductor (TI)

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Extended AC Electrical Characteristics
(SOIC package)
74ABT
74ABT
74ABT
TA eb40 Cto a85 C
TA eb40 Cto a85 C
TA eb40 Cto a85 C
VCC e 45V to 55V
VCC e 45V to 55V
VCC e 45V to 55V
Symbol
Parameter
CL e 50 pF
CL e 250 pF
CL e 250 pF
Units
8 Outputs Switching
(Note 5)
8 Outputs Switching
(Note 4)
(Note 6)
Min
Max
Min
Max
Min
Max
tPLH
Propagation Delay
15
52
20
68
20
90
ns
tPHL
Dn to On
15
52
20
68
20
90
tPLH
Propagation Delay
15
55
20
75
20
95
ns
tPHL
LE to On
15
55
20
75
20
95
tPZH
Output Enable Time
15
62
20
80
20
105
ns
tPZL
15
62
20
80
20
105
tPHZ
Output Disable Time
10
55
(Note 7)
(Note 7)
ns
tPZL
10
55
Note 4
This specification is guaranteed but not tested The limits apply to propagation delays for all paths described switching in phase (ie all LOW-to-HIGH
HIGH-to-LOW etc)
Note 5
This specification is guaranteed but not tested The limits represent propagation delay with 250 pF load capacitors in plce of the 50 pF load capacitors in
the standard AC load This specificaiton pertains to single output switching only
Note 6
This specification is guaranteed but not tested The limits represent propagation delays for all paths described switching in phase (ie all LOW-to-HIGH
HIGH-to-LOW etc) with 250 pF load capacitors in place of the 50 pF load capacitors in the standard AC load
Note 7
The TRI-STATE delay times are dominated by the RC network (500X 250 pF) on the output and has been excluded from the datasheet
Skew
Symbol
Parameter
74ABT
74ABT
Units
TA eb40 Cto a85 CTA eb40 Cto a85 C
VCC e 45V–55V
VCC e 45V–55V
CL e 50 pF
CL e 250 pF
8 Outputs Switching
8 Outputs Switching
(Note 3)
(Note 4)
Max
Max
tOSHL
Pin to Pin Skew
10
15
ns
(Note 1)
HL Transitions
tOSLH
Pin to Pin Skew
10
15
ns
(Note 1)
LH Transitions
tPS
Duty Cycle
14
35
ns
(Note 5)
LH–HL Skew
tOST
Pin to Pin Skew
15
39
ns
(Note 1)
LHHL Transitions
tPV
Device to Device Skew
20
40
ns
(Note 2)
LHHL Transitions
Note 1
Skew is defined as the absolute value of the difference between the actual propagation delays for any two separate outputs of the same device The
specification applies to any outputs switching HIGH to LOW (tOSHL) LOW to HIGH (tOSLH) or any combination switching LOW to HIGH andor HIGH to LOW
(tOST) This specification is guaranteed but not tested
Note 2
Propagation delay variation for a given set of conditions (ie temperature and VCC) from device to device This specification is guaranteed but not tested
Note 3
This specification is guaranteed but not tested The limits apply to propagation delays for all paths described switching in phase (ie all LOW-to-HIGH
HIGH-to-LOW etc)
Note 4
This specification is guaranteed but not tested The limits represent propagation delays with 250 pF load capacitors in place of the 50 pF load capacitors in
the standard AC load
Note 5
This describes the difference between the delay of the LOW-to-HIGH and the HIGH-to-LOW transition on the same pin It is measured across all the
outputs (drivers) on the same chip the worst (largest delta) number is the guaranteed specification This specification is guaranteed but not tested
5


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