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Datenblatt-Suchmaschine für elektronische Bauteile |
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Datenblatt-Suchmaschine für elektronische Bauteile |
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FW32306 Datenblatt(PDF) 9 Page - Agere Systems |
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FW32306 Datenblatt(HTML) 9 Page - Agere Systems |
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9 / 92 page  Agere Systems Inc. 9 Data Sheet, Rev. 1 FW323 06 1394a December 2005 PCI PHY/Link Open Host Controller Interface FW323 Functional Description (continued) Isochronous Register Access The Isochronous register access module services PCI slave accesses to OHCI registers within the isochro- nous block. The module also maintains the status of interrupts generated within the isochronous block and sends the isochronous interrupt status to the OHCI interrupt handler block. Isochronous Transmit DMA (ITDMA) The isochronous transmit DMA (ITDMA) module moves data from host memory to the link core, which will then send the data via the PHY core to the 1394 bus. This module consists of eight isochronous transmit contexts, each of which is independently configurable by software, and is capable of sending data on a separate 1394 isochronous channel. During each 1394 isochronous cycle, the ITDMA module will service each of the contexts and attempt to process one 1394 packet for each active context. While processing an active context, ITDMA will request access to the PCI bus. When granted PCI access, a descriptor block is fetched from host memory. This data is decoded by ITDMA to determine how much data is required and where in host memory the data resides. ITDMA initiates another PCI access to fetch this data, which is placed into the isochronous transmit FIFO for processing by the link core. If the context is not active, it is skipped by ITDMA for the current cycle. After processing each context, ITDMA writes a cycle marker word in the transmit FIFO to indicate to the link core that there is no more data for this isochronous cycle. As a summary, the major steps for the FW323 ITDMA to transmit a packet are the following: 1. Fetch a descriptor block from host memory. 2. Fetch data specified by the descriptor block from host memory and place it into the isochronous transmit FIFO. 3. Data in FIFO is read by the link and sent to the PHY core device interface. Isochronous Receive DMA (IRDMA) The isochronous receive DMA (IRDMA) module moves data from the isochronous receive FIFO to host memory. It consists of eight isochronous contexts, each of which is independently controlled by software. Normally, each context can process data on a single 1394 isochronous channel. However, software can select one context to receive data on multiple channels. When IRDMA detects that the link core has placed data into the receive FIFO, it immediately reads out the first word in the FIFO, which makes up the header of the isochronous packet. IRDMA extracts the channel number for the packet and packet filtering controls from the header. This information is compared with the Control registers for each context to determine if any context is to process this packet. If a match is found, IRDMA will request access to the PCI bus. When granted PCI access, a descriptor block is fetched from host memory. The descriptor provides information about the host memory block allocated for the incoming packet. IRDMA then reads the packet from the receive FIFO and writes the data to host memory via the PCI bus. If no match is found, IRDMA will read the remainder of the packet from the receive FIFO, but not process the data in any way. OHCI Asynchronous Data Transfer The asynchronous data transfer block within the OHCI core is functionally partitioned into blocks responsible for processing incoming SelfID packet streams, trans- mitting and receiving asynchronous 1394 packets, pro- cessing incoming physical request packets and outgoing physical response packets, and servicing accesses to OHCI registers within the respective asyn- chronous blocks. Asynchronous Register Access The Asynchronous register access module operates on PCI slave accesses to OHCI registers within the asyn- chronous block. The module also maintains the status of interrupts generated within the asynchronous block and sends the asynchronous interrupt status to the OHCI interrupt handler block. |
Ähnliche Teilenummer - FW32306 |
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Ähnliche Beschreibung - FW32306 |
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