Theory of Operation

The LM2450 is a high voltage monolithic three channel CRT

driver suitable for DTV applications. The LM2450 operates

with 220V and 12V power supplies. The part is housed in a

15-lead TO-247 molded plastic power package with thin

leads for improved metal-to-metal spacing.

The circuit diagram of the LM2450 is shown in Figure 2. The

PNP emitter follower, Q5, provides input buffering. Q1 and

Q2 form a fixed gain cascode amplifier with resistors R1 and

R2 setting the gain at −54. An additional cascode amplifier is

formed by Q7 and Q2. Gain of this stage is set to — 25 by

resistors R1 and R10. Q8 provides the input buffering for this

input. Q2 now becomes the summing point for both V

V

impedance of the cascode stage from the capacitance of the

CRT cathode, which decreases the sensitivity of the device

to load capacitance. Q6 provides biasing to the output emit-

ter follower stage to reduce crossover distortion at low signal

levels.

Figure 3 shows a typical test circuit for evaluation of the

LM2450. This circuit is designed to allow testing of the

LM2450 in a 50

Ω environment without the use of an expen-

sive FET probe. In this test circuit, the two 4.99 k

Ω resistors

form a 400:1 wideband, low capacitance probe when con-

nected to a 50

Ω coaxial cable and a 50Ω load (such as a

50

Ω oscilloscope input). The input signal from the generator

is AC coupled to the video inputs of the LM2450.

Application Hints

INTRODUCTION

National Semiconductor (NSC) is committed to provide ap-

plication information that assists our customers in obtaining

the best performance possible from our products. The fol-

lowing information is provided in order to support this com-

mitment. The reader should be aware that the optimization of

performance was done using a specific printed circuit board

designed at NSC. Variations in performance can be realized

due to physical changes in the printed circuit board and the

application. Therefore, the designer should know that com-

ponent value changes may be required in order to optimize

performance in a given application. The values shown in this

document can be used as a starting point for evaluation

purposes. When working with high bandwidth circuits, good

layout practices are also critical to achieving maximum per-

formance.

IMPORTANT INFORMATION

The LM2450 performance is targeted for the DTV market.

The application circuits shown in this document to optimize

performance and to protect against damage from CRT arc

over are designed specifically for the LM2450. If another

member of the LM245X family is used, please refer to its

datasheet.

POWER SUPPLY BYPASS

Since the LM2450 is a wide bandwidth amplifier, proper

power supply bypassing is critical for optimum performance.

Improper power supply bypassing can result in large over-

shoot, ringing or oscillation. 0.1 µF capacitors should be

connected from the supply pins, V

close to the LM2450 as is practical. Additionally, a 22 µF or

larger electrolytic capacitor should be connected from both

supply pins to ground reasonably close to the LM2450.

ARC PROTECTION

During normal CRT operation, internal arcing may occasion-

ally occur. This fast, high voltage, high-energy pulse can

damage the LM2450 output stage. The application circuit

shown in Figure 13 is designed to help clamp the voltage at

the output of the LM2450 to a safe level. The clamp diodes,

D1 and D2, should have a fast transient response, high peak

current rating, low series impedance and low shunt capaci-

tance. 1SS83 or equivalent diodes are recommended. D1

and D2 should have short, low impedance connections to

V

located very close to a separately decoupled bypass capaci-

tor (C3 in Figure 13). The ground connection of D2 and the

decoupling capacitor should be very close to the LM2450

ground. This will significantly reduce the high frequency

voltage transients that the LM2450 would be subjected to

during an arc over condition. Resistor R2 limits the arc over

current that is seen by the diodes while R1 limits the current

into the LM2450 as well as the voltage stress at the outputs

large value resistors for R1 and R2 would be desirable, but

this has the effect of increasing rise and fall times. Inductor

L1 is critical to reduce the initial high frequency voltage

levels that the LM2450 would be subjected to before the

clamp diodes have a chance to became activated. The

inductor will not only help protect the device but it will also

help minimize rise and fall times as well as minimize EMI.

For proper arc protection, it is important to not omit any of the

arc protection components shown in Figure 13.

EFFECT OF LOAD CAPACITANCE

Figure 7 shows the effect of increased load capacitance on

the speed of the device. Increasing the load capacitance

from 10 pF to 20 pF will first speed up the rise time by about

5 ns, then the rise time slows down by about 3 ns as the

capactor values come closer to 20 pF. The change of ca-

pacitor values has little affect on the fall time. Note that the

power consumption of the driver will significantly increase

with the larger capacitance.

EFFECT OF OFFSET

Figure 8 shows the variation in rise and fall times when the

black level of the device is varied from 180V to 200V

rise time increases by less than 2 ns as the offset is in-

creased in voltage and the fall time decreases by about 5 ns

with the same offset adjustment.

20144313

FIGURE 13. One Channel of the LM2450 with the

Recommended Application Circuit

www.national.com

6