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TA1318AF Datenblatt(PDF) 10 Page - Toshiba Semiconductor |
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TA1318AF Datenblatt(HTML) 10 Page - Toshiba Semiconductor |
10 / 42 page TA1318AF 2003-02-19 10 Pin No. Pin Name Function Interface Circuit Input Signal/Output Signal 24 SYNC2-IN Input Y signal (Note 1) for sync separation circuit. Input via clamp capacitor. White 100% = 1 Vp−p or 25 DAC1 (V SYNC output) DAC1 output pin. In Test mode, it outputs VD or composite sync signal to frequency counter. To improve the driving ability, it is possible to connect a resister (minimum: 2 k Ω) between this pin and GND. However, when the resister is added, the output DC voltage is down. DC or V SYNC Note 1: The signal format for SYNC1-IN (pin 26) and SYNC2-IN (pin 24) NTSC (525I/60 Hz), PAL/SECAM (625I/50 Hz), NTSC Double Scan (525I/120 Hz), PAL/SECAM Double Scan (625I/100 Hz), 525P/60 Hz, 750P/60 Hz, 1125I/60 Hz, 1125P/30 Hz This IC doesn’t have the sync-separation circuit for non-standard signals like weak strength signal, ghost signal and so on. 7 V 0 V 11 25 18 200 Ω 1 k Ω 11 24 5 |
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