Philips Semiconductors

Product specification

74ABT16823A

74ABTH16823A

18-bit bus-interface D-type flip-flop

with reset and enable (3-State)

1998 Feb 27

4

LOGIC DIAGRAM

R

nD

nD0

nQ0

nMR

nOE

R

nD

nD1

nQ1

R

nD

nD2

nQ2

R

nD

nD3

nQ3

R

nD

nD4

nQ4

R

nD

nD5

nQ5

R

nD

nD6

nQ6

R

nD

nD7

nQ7

R

nD

nD8

nQ8

nCP

nCE

SH00016

CP

CP

CP

CP

CP

CP

CP

CP

CP

Q

Q

Q

Q

Q

Q

Q

Q

Q

n = 1 or 2

FUNCTION TABLE

INPUTS

OUTPUTS

OPERATING MODE

nOE

nMR

nCE

nCP

nDx

nQ0 – nQ8

OPERATING MODE

L

L

X

X

X

L

Clear

L

H

L

↑

h

H

Load and read data

L

H

L

↑

l

L

Load and read data

L

H

H

↑

X

NC

Hold

H

X

X

X

X

Z

High impedance

H = High voltage level

h

= High voltage level one set-up time prior to the Low-to-High clock transition

L

= Low voltage level

l

= Low voltage level one set-up time prior to the Low-to-High clock transition

NC= No change

X = Don’t care

Z = High impedance “off” state

↑ = Low to High clock transition

↑ = Not a Low-to-High clock transition