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GS71208TP-8 Datenblatt(PDF) 5 Page - GSI Technology

Teilenummer GS71208TP-8
Bauteilbeschribung  128K x 8 1Mb Asynchronous SRAM
Download  11 Pages
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Hersteller  GSI [GSI Technology]
Direct Link  http://www.gsitechnology.com
Logo GSI - GSI Technology

GS71208TP-8 Datenblatt(HTML) 5 Page - GSI Technology

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Rev: 1.03 10/2001
5/11
© 1999, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS71208TP
AC Test Conditions
AC Characteristics
* These parameters are sampled and are not 100% tested
Read Cycle
Parameter
Symbol
-8
Unit
Min
Max
Read cycle time
tRC
8
ns
Address access time
tAA
8
ns
Chip enable access time (CE)
tAC
8
ns
Output enable to output valid (OE)
tOE
3.5
ns
Output hold from address change
tOH
3
ns
Chip enable to output in low Z (CE)
tLZ*
3
ns
Output enable to output in low Z (OE)
tOLZ*
0
ns
Chip disable to output in High Z (CE)
tHZ*
4
ns
Output disable to output in High Z (OE)
tOHZ*
3.5
ns
DQ
VT = 1.4 V
50
30pF1
DQ
3.3 V
Output Load 1
Output Load 2
589
434
5pF1
Note:
1. Include scope and jig capacitance.
2. Test conditions as specified with output loading as shown in Fig. 1
unless otherwise noted.
3. Output load 2 for tLZ, tHZ, tOLZ and tOHZ
Parameter
Conditions
Input high level
VIH = 2.4 V
Input low level
VIL = 0.4 V
Input rise time
tr = 1 V/ns
Input fall time
tf = 1 V/ns
Input reference level
1.4 V
Output reference level
1.4 V
Output load
Fig. 1& 2


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