Philips Semiconductors

Product specification

74F273A

Octal D flip–flop

1996 Mar 12

6

AC SETUP REQUIREMENTS FOR ’F273A

LIMITS

SYMBOL

PARAMETER

WAVEFORM

UNIT

Min

Typ

Max

Min

Max

Setup time, High or Low

Dn to CP

3

3.0

2.0

2.5

2.5

Hold time, High or Low

Dn to CP

3

0.5

0.0

2.5

1.0

ns

Clock pulse width

High or Low

1

4.5

3.5

5.0

4.0

ns

Master Reset pulse width, Low

2

3.0

3.5

ns

Recovery time

MR to CP

2

4.0

5.0

ns

AC WAVEFORMS

CP

Qn

SF00294

Waveform 1. Propagation Delay, Clock Input to Output, Clock

Pulse Width, and Maximum Clock Frequency

SF00158

MR

Qn

CP

Waveform 2. Master Reset Pulse Width, Master Reset to Output

Delay and Master Reset to Clock Recovery Time

th(H)

ts(H)

CP

SF00191

VM

VM

VM

VM

VM

VM

th(L)

ts(L)

Dn

Waveform 3. Data Setup and Hold Times

The shaded areas indicate when the input is permitted to change for predictable output

performance.