Datenblatt-Suchmaschine für elektronische Bauteile
  German  ▼
ALLDATASHEETDE.COM

X  

WV3HG64M72EEU403PD4ISG Datenblatt(PDF) 6 Page - White Electronic Designs Corporation

Teilenummer WV3HG64M72EEU403PD4ISG
Bauteilbeschribung  512MB - 64Mx72 DDR2 SDRAM, UNBUFFERED SO-DIMM, w/PLL
Download  11 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Hersteller  WEDC [White Electronic Designs Corporation]
Direct Link  http://www.whiteedc.com
Logo WEDC - White Electronic Designs Corporation

WV3HG64M72EEU403PD4ISG Datenblatt(HTML) 6 Page - White Electronic Designs Corporation

Back Button WV3HG64M72EEU403PD4ISG Datasheet HTML 2Page - White Electronic Designs Corporation WV3HG64M72EEU403PD4ISG Datasheet HTML 3Page - White Electronic Designs Corporation WV3HG64M72EEU403PD4ISG Datasheet HTML 4Page - White Electronic Designs Corporation WV3HG64M72EEU403PD4ISG Datasheet HTML 5Page - White Electronic Designs Corporation WV3HG64M72EEU403PD4ISG Datasheet HTML 6Page - White Electronic Designs Corporation WV3HG64M72EEU403PD4ISG Datasheet HTML 7Page - White Electronic Designs Corporation WV3HG64M72EEU403PD4ISG Datasheet HTML 8Page - White Electronic Designs Corporation WV3HG64M72EEU403PD4ISG Datasheet HTML 9Page - White Electronic Designs Corporation WV3HG64M72EEU403PD4ISG Datasheet HTML 10Page - White Electronic Designs Corporation Next Button
Zoom Inzoom in Zoom Outzoom out
 6 / 11 page
background image
WV3HG64M72EEU-PD4
May 2006
Rev. 2
ADVANCED
6
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
DDR2 ICC SPECIFICATIONS AND CONDITIONS
Includes DDR2 SDRAM components only
VCC = +1.8V ± 0.1V
Symbol Proposed Conditions
806
665
534
403
Units
ICC0*
Operating one bank active-precharge current;
tCK = tCK(ICC), tRC = tRC(ICC), tRAS = tRASmin(ICC); CKE is HIGH, CS# is HIGH between valid
commands; Address bus inputs are SWITCHING; Data bus inputs are SWITCHING
TBD
1,065
1, 020
1,020
mA
ICC1*
Operating one bank active-read-precharge current;
IOUT = 0mA; BL = 4, CL = CL(ICC), AL = 0; tCK = tCK(ICC), tRC = tRC (ICC), tRAS = tRASmin(ICC), tRCD
= tRCD(ICC); CKE is HIGH, CS# is HIGH between valid commands; Address bus inputs are
SWITCHING; Data pattern is same as ICC4W
TBD
1,200
1,115
1,155
mA
ICC2P*
Precharge power-down current;
All banks idle; tCK = tCK(ICC); CKE is LOW; Other control and address bus inputs are STABLE; Data
bus inputs are FLOATING
TBD
372
372
372
mA
ICC2Q**
Precharge quiet standby current;
All banks idle; tCK = tCK(ICC); CKE is HIGH, CS# is HIGH; Other control and address bus inputs are
STABLE; Data bus inputs are FLOATING
TBD
615
570
570
mA
ICC2N**
Precharge standby current;
All banks idle; tCK = tCK(ICC); CKE is HIGH, CS# is HIGH; Other control and address bus inputs are
SWITCHING; Data bus inputs are SWITCHING
TBD
660
615
615
mA
ICC3P**
Active power-down current;
All banks open; tCK = tCK(ICC); CKE is LOW; Other control and
address bus inputs are STABLE; Data bus inputs are FLOATING
Fast PDN Exit MRS(12) = 0
TBD
570
570
570
mA
Slow PDN Exit MRS(12) = 1
TBD
408
408
408
mA
ICC3N**
Active standby current;
All banks open; tCK = tCK(ICC), tRAS = tRASmax(ICC), tRP = tRP(ICC); CKE is HIGH, CS# is HIGH between
valid commands; Other control and address bus inputs are SWITCHING; Data bus inputs are
SWITCHING
TBD
795
750
750
mA
ICC4W*
Operating burst write current;
All banks open, Continuous burst writes; BL = 4, CL = CL(ICC), AL = 0; tCK = tCK(ICC), tRAS =
tRASmax(ICC), tRP = tRP(ICC); CKE is HIGH, CS# is HIGH between valid commands; Address bus
inputs are SWITCHING; Data bus inputs are SWITCHING
TBD
1,560
1,380
1,290
mA
ICC4R*
Operating burst read current;
All banks open, Continuous burst reads, IOUT = 0mA; BL = 4, CL = CL(ICC), AL = 0; tCK = tCK(ICC), tRAS
= tRASmax(ICC), tRP = tRP(ICC); CKE is HIGH, CS# is HIGH between valid commands; Address bus
inputs are SWITCHING; Data pattern is same as ICC4W
TBD
1,605
1,425
1,290
mA
ICC5B**
Burst auto refresh current;
tCK = tCK(ICC); Refresh command at every tRFC(ICC) interval; CKE is HIGH, CS# is HIGH between
valid commands; Other control and address bus inputs are SWITCHING; Data bus inputs are
SWITCHING
TBD
1,650
1,560
1,560
mA
ICC6**
Self refresh current;
CK and CK\ at 0V; CKE 0.2V; Other control and address bus
inputs are FLOATING; Data bus inputs are FLOATING
Normal
TBD
72
72
72
mA
ICC7*
Operating bank interleave read current;
All bank interleaving reads, IOUT = 0mA; BL = 4, CL = CL(ICC), AL = tRCD(ICC)-1*tCK(ICC); tCK =
tCK(ICC), tRC = tRC(ICC), tRRD = tRRD(ICC), tRCD = 1*tCK(ICC); CKE is HIGH, CS# is HIGH between valid
commands; Address bus inputs are STABLE during DESELECTs; Data bus inputs are SWITCHING.
TBD
2,280
2,280
2,280
mA
Note: ICC specification is based on
SAMSUNG components. Other DRAM Manufacturers specification may be different.
*: Value calculated as one module rank in this operating condition, and all other module ranks in ICC2P (CKE LOW) mode.
**: Value calculated reflects all module ranks in this operating condition.


Ähnliche Teilenummer - WV3HG64M72EEU403PD4ISG

HerstellerTeilenummerDatenblattBauteilbeschribung
logo
White Electronic Design...
WV3HG64M72EER-D6 WEDC-WV3HG64M72EER-D6 Datasheet
179Kb / 11P
   512MB - 64Mx72 DDR2 SDRAM REGISTERED DIMM, w/PLL
WV3HG64M72EER-D7 WEDC-WV3HG64M72EER-D7 Datasheet
181Kb / 11P
   512MB - 64Mx72 DDR2 SDRAM REGISTERED, w/PLL, Mini-DIMM
WV3HG64M72EER-PD4 WEDC-WV3HG64M72EER-PD4 Datasheet
195Kb / 11P
   512MB - 64Mx72 DDR2 SDRAM REGISTERED, SO-DIMM, w/PLL
WV3HG64M72EER403D6IMG WEDC-WV3HG64M72EER403D6IMG Datasheet
179Kb / 11P
   512MB - 64Mx72 DDR2 SDRAM REGISTERED DIMM, w/PLL
WV3HG64M72EER403D6ISG WEDC-WV3HG64M72EER403D6ISG Datasheet
179Kb / 11P
   512MB - 64Mx72 DDR2 SDRAM REGISTERED DIMM, w/PLL
More results

Ähnliche Beschreibung - WV3HG64M72EEU403PD4ISG

HerstellerTeilenummerDatenblattBauteilbeschribung
logo
White Electronic Design...
WV3HG64M72EER-PD4 WEDC-WV3HG64M72EER-PD4 Datasheet
195Kb / 11P
   512MB - 64Mx72 DDR2 SDRAM REGISTERED, SO-DIMM, w/PLL
WV3HG64M72EER-D6 WEDC-WV3HG64M72EER-D6 Datasheet
179Kb / 11P
   512MB - 64Mx72 DDR2 SDRAM REGISTERED DIMM, w/PLL
WED3DG7266V-D1 WEDC-WED3DG7266V-D1 Datasheet
120Kb / 7P
   512MB - 64Mx72 SDRAM, UNBUFFERED, w/PLL
WV3HG64M72EER-D7 WEDC-WV3HG64M72EER-D7 Datasheet
181Kb / 11P
   512MB - 64Mx72 DDR2 SDRAM REGISTERED, w/PLL, Mini-DIMM
WV3HG64M72AER-AD6 WEDC-WV3HG64M72AER-AD6 Datasheet
161Kb / 10P
   512MB - 64Mx72 DDR2 SDRAM REGISTERED, w/PLL
W3HG64M72EER-AD7 WEDC-W3HG64M72EER-AD7 Datasheet
195Kb / 14P
   512MB - 64Mx72 DDR2 SDRAM REGISTERED, w/PLL, VLP Mini-DIMM
WV3HG64M64EEU-D4 WEDC-WV3HG64M64EEU-D4 Datasheet
172Kb / 11P
   512MB - 64Mx64 DDR2 SDRAM UNBUFFERED, SO-DIMM
WV3HG128M72EEU-PD4 WEDC-WV3HG128M72EEU-PD4 Datasheet
174Kb / 11P
   1GB - 128Mx72 DDR2 SDRAM UNBUFFERED, SO-DIMM w/PLL
W3EG7266S-AD4 WEDC-W3EG7266S-AD4 Datasheet
191Kb / 13P
   512MB - 64Mx72 DDR SDRAM UNBUFFERED ECC w/PLL
logo
Elpida Memory
EBE51UD8AGWA ELPIDA-EBE51UD8AGWA Datasheet
245Kb / 25P
   512MB Unbuffered DDR2 SDRAM DIMM
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11


Datenblatt Download

Go To PDF Page


Link URL




Privatsphäre und Datenschutz
ALLDATASHEETDE.COM
War ALLDATASHEET hilfreich?  [ DONATE ] 

Über Alldatasheet   |   Werbung   |   Kontakt   |   Privatsphäre und Datenschutz   |   Linktausch   |   Hersteller
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com