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74HC297 Datenblatt(PDF) 10 Page - NXP Semiconductors |
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74HC297 Datenblatt(HTML) 10 Page - NXP Semiconductors |
10 / 12 page September 1993 10 Philips Semiconductors Product specification Digital phase-locked-loop filter 74HC/HCT297 DC CHARACTERISTICS FOR 74HCT For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”. Output capability: standard/bus driver ICC category: MSI Note to HCT types The value of additional quiescent supply current ( ∆I CC) for a unit load of 1 is given in the family specifications. To determine ∆ICC per input, multiply this value by the unit load coefficient shown in the table below. INPUT UNIT LOAD COEFFICIENT ENCTR, D/U 0.3 A, B, C, D, KCP, φA2 0.6 I/DCP, φA1, φB 1.5 AC CHARACTERISTICS FOR 74HCT GND = 0 V, tr =tf = 6 ns; CL = 50 pF SYMBOL PARAMETER Tamb (°C) UNIT TEST CONDITIONS 74HCT VCC (V) WAVEFORMS +25 −40 to +85 −40 to +125 min. typ. max. min. max. min. max. tPHL/ tPLH propagation delay I/DCP to I/DOUT 21 35 44 53 ns 4.5 Fig.11 tPHL/ tPLH propagation delay φA1, φB to XORPDOUT 16 32 40 48 ns 4.5 Fig.12 tPHL/ tPLH propagation delay φB, φA2 to ECPDOUT 22 44 55 66 ns 4.5 Fig.13 tTHL/ tTLH output transition time bus driver output I/DOUT (pin 7) 5 12 15 18 ns 4.5 Fig.11 tTHL/ tTLH output transition time standard outputs XORPDOUT, ECPDOUT (pins 11, 12) 7 15 19 22 ns 4.5 Figs 12 and 13 tW clock pulse width KCP 16 8 20 24 ns 4.5 Fig.14 tW clock pulse width I/DCP 25 13 31 38 ns 4.5 Fig.11 tsu set-up time D/U, ENCTR to KCP 24 13 30 36 ns 4.5 Fig.14 th hold time D/U, ENCTR to KCP 0 −8 0 0 ns 4.5 Fig.14 fmax maximum clock pulse frequency KCP 30 62 24 20 MHz 4.5 Fig.14 fmax maximum clock pulse frequency I/DCP 20 36 16 13 MHz 4.5 Fig.11 |
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