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74HC4510DB Datenblatt(PDF) 8 Page - NXP Semiconductors |
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74HC4510DB Datenblatt(HTML) 8 Page - NXP Semiconductors |
8 / 12 page December 1990 8 Philips Semiconductors Product specification BCD up/down counter 74HC/HCT4510 DC CHARACTERISTICS FOR 74HCT For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”. Output capability: standard ICC category: MSI Note to HCT types The value of additional quiescent supply current ( ∆ICC) for a unit load of 1 is given in the family specifications. To determine ∆ICC per input, multiply this value by the unit load coefficient shown in the table below AC CHARACTERISTICS FOR 74HCT GND = 0 V; tr =tf = 6 ns; CL = 50 pF INPUT UNIT LOAD COEFFICIENT Dn PL, CE UP/DN CP MR 0.75 1.00 1.00 1.25 1.50 SYMBOL PARAMETER Tamb (°C) UNIT TEST CONDITIONS 74HCT VCC (V) WAVEFORMS +25 −40 to +85 −40 to +125 min. typ. max. min. max. min. max. tPHL/ tPLH propagation delay CP to Qn 27 50 63 75 ns 4.5 Fig.7 tPHL propagation delay MR to Qn 25 42 53 63 ns 4.5 Fig.10 tPLH/ tPHL propagation delay PL to Qn 28 53 66 80 ns 4.5 Fig.9 tPHL/ tPLH propagation delay CP to TC 29 58 73 87 ns 4.5 Fig.7 tPHL/ tPLH propagation delay CE to TC 17 31 39 47 ns 4.5 Fig.8 tPLH propagation delay MR to TC 31 50 63 75 ns 4.5 Fig.10 tPHL/ tPLH propagation delay PL to TC 35 68 85 102 ns 4.5 Fig.10 tTHL/ tTLH output transition time 7 15 19 22 ns 4.5 Fig.9 tW pulse width CP, CE HIGH or LOW 16 9 20 24 ns 4.5 Fig.7 tW parallel load pulse width HIGH 16 6 20 24 ns 4.5 Fig.10 tW master reset pulse width HIGH 20 4 25 30 ns 4.5 Fig.10 |
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