Datenblatt-Suchmaschine für elektronische Bauteile |
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74AC125TTR Datenblatt(PDF) 1 Page - STMicroelectronics |
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74AC125TTR Datenblatt(HTML) 1 Page - STMicroelectronics |
1 / 9 page 1/9 July 2001 s HIGH SPEED: tPD = 4ns (TYP.) at VCC = 5V s LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C s HIGH NOISE IMMUNITY: VNIH = VNIL = 28 % VCC (MIN.) s 50 Ω TRANSMISSION LINE DRIVING CAPABILITY s SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN) s BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL s OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V s PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 125 s IMPROVED LATCH-UP IMMUNITY DESCRIPTION The 74AC125 is an advanced high-speed CMOS QUAD BUS BUFFER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. The device requires the 3-STATE control input G to be set high to place the output go in to the high impedance state. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. 74AC125 QUAD BUS BUFFERS (3-STATE) PIN CONNECTION AND IEC LOGIC SYMBOLS ORDER CODES PACKAGE TUBE T & R DIP 74AC125B SOP 74AC125M 74AC125MTR TSSOP 74AC125TTR TSSOP DIP SOP |
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Ähnliche Beschreibung - 74AC125TTR |
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