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AD5533ABC-1 Datenblatt(PDF) 1 Page - Analog Devices |
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AD5533ABC-1 Datenblatt(HTML) 1 Page - Analog Devices |
1 / 16 page REV. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. a AD5532B* One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2002 32-Channel, 14-Bit DAC with Precision Infinite Sample-and-Hold Mode FUNCTIONAL BLOCK DIAGRAM SYNC / CS WR CAL A4–A0 SCLK OFFSET_SEL AD5532B DVCC VIN DIN DOUT ADDRESS INPUT REGISTER AVCC REF IN REF OUT OFFS IN INTERFACE CONTROL LOGIC OFFS OUT VOUT 31 VOUT 0 TRACK / RESET BUSY DAC GND AGND DGND SER / PAR VDD VSS DAC DAC ADC MUX DAC MODE 14-BIT BUS FEATURES High Integration: 32-Channel DAC in 12 mm 12 mm CSPBGA Guaranteed Monotonic to 14 Bits Infinite Sample-and-Hold Capability to 0.018% Accuracy Infinite Sample-and-Hold Total Unadjusted Error 2.5 mV Adjustable Voltage Output Range Readback Capability DSP/Microcontroller Compatible Serial Interface Output Impedance 0.5 Output Voltage Span 10 V Temperature Range –40 C to +85 C APPLICATIONS Automatic Test Equipment Optical Networks Level Setting Instrumentation Industrial Control Systems Data Acquisition Low Cost I/O GENERAL DESCRIPTION The AD5532B is a 32-channel, voltage output, 14-bit DAC with an additional precision infinite sample-and-hold mode. The selected DAC register is written to via the 3-wire serial inter- face and VOUT for this DAC is then updated to reflect the new contents of the DAC register. DAC selection is accomplished via address bits A0–A4. The output voltage range is determined by the offset voltage at the OFFS_IN pin and the gain of the output amplifier. It is restricted to a range from VSS + 2 V to VDD – 2 V because of the headroom of the output amplifier. The device is operated with AVCC = +5 V ± 5%, DV CC = +2.7 V to +5.25 V, VSS = –4.75 V to –16.5 V, and VDD = +8 V to +16.5 V and requires a stable 3 V reference on REF_IN as well as an offset voltage on OFFS_IN. PRODUCT HIGHLIGHTS 1. 32-channel, 14-bit DAC in one package, guaranteed monotonic. 2. The AD5532B is available in a 74-lead CSPBGA with a body size of 12 mm 12 mm. 3. In infinite sample-and-hold mode, a total unadjusted error of ±2.5 mV is achieved by laser-trimming on-chip resistors. *Protected by U.S. Patent No. 5,969,657; other patents pending. |
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