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AM29LV320DB90EV Datenblatt(PDF) 4 Page - SPANSION |
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AM29LV320DB90EV Datenblatt(HTML) 4 Page - SPANSION |
4 / 55 page 4Am29LV320D November 15, 2004 GENERAL DESCRIPTION T he Am29LV320D is a 32 megabit, 3.0 volt-only flash memory device, organized as 2,097,152 words of 16 bits each or 4,194,304 bytes of 8 bits each. Word mode data appears on DQ0–DQ15; byte mode data appears on DQ0–DQ7. The device is designed to be pro- grammed in-system with the standard 3.0 volt VCC supply, and can also be programmed in standard EPROM programmers. The device is available with an access time of 90 or 120 ns. The devices are offered in 48-pin TSOP and 48-ball FBGA packages. Standard control pins—chip enable (CE#), write enable (WE#), and output enable (OE#)—control nor- mal read and write operations, and avoid bus contention issues. The device requires only a single 3.0 volt power supply for both read and write func- tions. Internally generated and regulated volt- ages are provided for the program and erase operations. Am29LV320D Features The SecSiTM Sector (Secured Silicon) is an extra sector capable of being permanently locked by AMD or customers. The SecSi Indi- cator Bit (DQ7) is permanently set to a 1 if the part is factory locked, and set to a 0 if cus- tomer lockable. This way, customer lockable parts can never be used to replace a factory locked part. Note that the Am29LV320D has a SecSi Sector size of 64 Kbytes. AMD de- vices designated as replacements or sub- stitutes, such as the Am29LV320M, have 256 bytes. This should be considered dur- ing system design. Factory locked parts provide several options. The SecSi Sector may store a secure, random 16 byte ESN (Electronic Serial Number), cus- tomer code (programmed through AMD’s Ex- p r e ssF l a sh s e rv ic e), or bo th . C us to m er Lockable parts may utilize the SecSi Sector as bonus space, reading and writing like any other flash sector, or may permanently lock their own code there. The device offers complete compatibility with the JEDEC single-power-supply Flash com- mand set standard. Commands are written to the command register using standard micro- processor write timings. Reading data out of the device is similar to reading from other Flash or EPROM devices. The host system can detect whether a program or erase operation is complete by using the de- vice status bits: RY/BY# pin, DQ7 (Data# Poll- ing) and DQ6/DQ2 (toggle bits). After a program or erase cycle is completed, the device automatically returns to the read mode. The sector erase architecture allows mem- ory sectors to be erased and reprogrammed without affecting the data contents of other sectors. The device is fully erased when shipped from the factory. Hardware data protection measures include a low VCC detector that automatically inhibits write operations during power transitions. The hardware sector protection feature disables both program and erase operations in any com- bination of the sectors of memory. This can be achieved in-system or via programming equip- ment. The device offers two power-saving features. When addresses are stable for a specified amount of time, the device enters the auto- matic sleep mode. The system can also place the device into the standby mode. Power con- sumption is greatly reduced in both modes. |
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