TCH305-0001-002
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SUBJECT TO CHANGE
Arithmetic Logic Unit
The arithmetic logic unit (ALU) performs 32-bit arithmetic and logic instructions in a single
clock cycle.
Barrel Shifter
The 32-bit barrel shifter allows a general shift operation to be combined with a general
ALU operation in a single instruction that executes in a single clock cycle.
Hardware Multiplier
The ARM7TDMI processor includes a dedicated 32 x 8 hardware multiplier. Additionally,
the multiplier supports multiply-accumulate functions, which are central to many digital
signal processing (DSP) applications.
The performance of the multiplier depends on the data values and the type of data multi-
plied, as shown in Table 4. The multiplier terminates the instruction immediately upon
computing the result, regardless of the data width.
Table 4. ARM7TDMI Multiplier Performance.
Multiplier Operation
Clock Cycles
32 x 32 = 32
Multiply two 32-bit values with a 32-bit result
2 to 5
32 x 32 = 64
Multiply two 32-bit values with a 64-bit result
3 to 6
32 x 32 + 32 = 32
Multiply two 32-bit values, add the result with a 32-bit value, producing
a 32-bit result
3 to 6
32 x 32 + 64 = 64
Multiply two 32-bit values, add the result with a 64-bit value, producing
a 64-bit result
4 to 7
Conditional Code Execution
Each ARM instruction is conditionally executed, based on the current status flags. The
capability minimizes short branches, which might otherwise reduce system performance.
Three-Address Data Processing Instructions
The two source operand registers and the result register are independently specified,
which aids performance and improves code density.
Thumb Instruction Set
The Thumb instruction set provides an extremely dense 16-bit representation of the most
commonly used instructions. Thumb offers cost advantages for smaller systems and per-
formance advantages in systems with 8-bit or 16-bit external memory subsystems.
CISC-like Instructions
Load and store multiple instructs allow an application to quickly and easily save and re-
store registers