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74AUP1G885 Datenblatt(PDF) 5 Page - NXP Semiconductors |
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74AUP1G885 Datenblatt(HTML) 5 Page - NXP Semiconductors |
5 / 19 page 74AUP1G885_1 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Preliminary data sheet Rev. 01.00 — 26 January 2006 5 of 19 Philips Semiconductors 74AUP1G885 Low-power dual function gate 8. Functional description 8.1 Function table [1] H = HIGH voltage level; L = LOW voltage level. 9. Limiting values [1] The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] For VSSOP8 packages: above 110 °C the value of Ptot derates linearly with 8.0 mW/K. For XSON8 packages: above 45 °C the value of Ptot derates linearly with 2.4 mW/K. Table 5: Function table [1] Input Output A B C 1Y 2Y LLLLL H LLLH LH LLH H H LLH LLH LL HL HHL L HHL H HHHHL Table 6: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit VCC supply voltage −0.5 +4.6 V IIK input clamping current VI <0V - −50 mA VI input voltage [1] −0.5 +4.6 V IOK output clamping current VO <0V - −50 mA VO output voltage active mode [1] −0.5 VCC + 0.5 V Power-down mode [1] −0.5 +4.6 V IO output current VO =0 VtoVCC - ±20 mA ICC quiescent supply current - +50 mA IGND ground current - −50 mA Tstg storage temperature −65 +150 °C Ptot total power dissipation Tamb = −40 °C to +125 °C [2] - 300 mW |
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