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74AUP1G57GF Datenblatt(PDF) 10 Page - NXP Semiconductors |
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74AUP1G57GF Datenblatt(HTML) 10 Page - NXP Semiconductors |
10 / 22 page 74AUP1G57_1 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Preliminary data sheet Rev. 01.00 — 16 January 2006 10 of 22 Philips Semiconductors 74AUP1G57 Low power configurable multiple function gate [1] All typical values are measured at nominal VCC. [2] CPD is used to determine the dynamic power dissipation (PD in µW). PD =CPD × VCC2 × fi × N+ Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; Σ(C L × VCC 2 × f o) = sum of the outputs. [3] The condition is VI = GND to VCC. Tamb = 25 °C; CL = 30 pF tPHL, tPLH HIGH-to-LOW and LOW-to-HIGH propagation delay A, B and C to Y see Figure 12 VCC = 0.8 V - 37.8 - ns VCC = 1.1 V to 1.3 V 4.6 10.4 20.9 ns VCC = 1.4 V to 1.6 V 3.6 7.4 12.2 ns VCC = 1.65 V to 1.95 V 3.5 6.2 9.9 ns VCC = 2.3 V to 2.7 V 3.4 5.2 7.4 ns VCC = 3.0 V to 3.6 V 3.2 4.9 6.6 ns Tamb = 25 °C CPD power dissipation capacitance f = 1 MHz [2] [3] VCC = 0.8 V - 2.9 - pF VCC = 1.1 V to 1.3 V - 3.0 - pF VCC = 1.4 V to 1.6 V - 3.2 - pF VCC = 1.65 V to 1.95 V - 3.4 - pF VCC = 2.3 V to 2.7 V - 3.9 - pF VCC = 3.0 V to 3.6 V - 4.5 - pF Table 10: Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 13 Symbol Parameter Conditions Min Typ [1] Max Unit |
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