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CS4124 Datenblatt(PDF) 8 Page - ON Semiconductor

Teilenummer CS4124
Bauteilbeschribung  High Side PWM FET Controller
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Hersteller  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

CS4124 Datenblatt(HTML) 8 Page - ON Semiconductor

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8
reset and the IC reverts back to run mode until another fault
occurs. If a number of faults occur in a given period of time,
the IC “times out” and disables the MOSFET for a long
period of time to let it cool off. This is accomplished by
charging the CFLT capacitor each time an over current
condition occurs. If a cycle goes by with no overcurrent fault
occurring, an even smaller amount of charge will be
removed from CFLT. If enough faults occur together,
eventually CFLT will charge up to 2.4 V and the fault latch
will be set. The fault latch will not be reset until CFLT
discharges to 0.6 V. This action will continue indefinitely if
the fault persists.
The off time and on time are set by the following:
Off Time
+ CFLT
2.4V
* 0.6V
4.5
mA
On Time
+ CFLT
2.4V
* 0.6V
IAVG
where:
IAVG + (295.5 mA
DC)
* [4.5 mA
(1
* DC)]
DC
+ PWM Duty Cycle
IAVG + (300 mA
DC)
* 4.5 mA
Boost Switch Mode Power Supply
The CS4124 has an integrated boost mode power supply
which charges the gate of the external high–side MOSFET
to greater than 5.0 V above VCC. Three leads are used for
voltage boost. They are Boost, PMP and SNI. The PMP lead
is the collector of a darlington tied NPN power transistor.
This device charges the inductor during its on time. The
boost lead is the input to chip from the external reservoir
capacitor. The SNI lead is the emitter of the power NPN and
is connected externally to the RSNI resistor.
The power supply is controlled by the oscillator. At the
start of a cycle an R–S flip flop is set the internal power NPN
transistor is turned on and energy begins to build up in the
inductor. The RSNI resistor sets the peak current of the
inductor by tripping a comparator when the voltage across
the resistor is 450 mV. The flip flop is reset and the inductor
delivers its stored energy to the load. The ripple voltage
(VRIPPLE) at the Boost lead is controlled by CBOOST. A
snubber circuit, made up of a series resistor and capacitor, is
required to dampen the ringing of the inductor. A value of
4.0
Ω is recommended for RSNI.
A zener diode is needed between the boost output voltage
and the battery. This will clamp the boost lead to a specified
value above the battery to prevent damage to the IC. A 9.0
volt zener diode is recommended.
Sleep State
This device will enter into a low current mode (< 275
µA)
when CTL lead is brought to less than 0.5 V. All functions
are disabled in this mode, except for the regulator.
Inhibit
When the inhibit is greater than 2.5 V the internal latch is
set and the external MOSFET will be turned off for the
remainder of the oscillator cycle. The latch is then reset at the
start of the next cycle.
Overvoltage Shutdown
The IC will disable the output during an overvoltage
event. This is a real time fault event and does not set the
internal latch and therefore is independent of the oscillator
timing (i.e. asynchronous). There is 325 mV (typical) of
hysteresis on the overvoltage function. There is no
undervoltage lockout. The device will shutdown gracefully
once it runs out of headroom.
Reverse Battery
The CS4124 will not survive a reverse battery condition.
A series diode is required between the battery and the VCC
lead for reverse battery.
Load Dump
A 10
Ω resistor, (RS) is placed in series with VCC to limit
the current into the IC during 40 V peak transient conditions.


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