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MC10E411FN Datenblatt(PDF) 5 Page - ON Semiconductor

Teilenummer MC10E411FN
Bauteilbeschribung  5V ECL 1:9 Differential PECL/NECL RAMBus Clock Buffer
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Hersteller  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
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MC10E411
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Table 5. AC CHARACTERISTICS VCCx = 5.0 V; VEE = 0.0 V or VCCx = 0.0 V; VEE = −5.0 V (Note 7)
Symbol
Characteristic
0°C
25°C
85°C
Unit
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
fMAX
Maximum Toggle Frequency
700
700
700
MHz
tPLH
tPHL
Propagation Delay to Output
IN (Differential) (Note 8)
IN (Single−Ended) (Note 9)
EN to Q
400
350
450
600
650
850
430
380
450
630
680
850
500
450
450
700
750
850
ps
ts
Setup Time (Note 10)
EN to IN
200
0
200
0
200
0
ps
tH
Hold Time (Note 11)
IN to EN
0
−200
0
−200
0
−200
ps
tR
Release Time (Note 12)
EN to IN
300
100
300
100
300
100
ps
tskew
Within-Device Skew (Note 13)
Part-to-Part Skew (Diff)
50
200
50
200
50
200
ps
tJITTER
Random Clock Jitter (RMS)
< 1
< 1
< 1
ps
VPP
Input Voltage Swing
(Differential Configuration)
250
1000
250
1000
250
1000
mV
tr/tf
Output Rise/Fall Time
(20%−80%)
275
600
275
600
275
600
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
7. VEE can vary +0.5 V / −0.5 V.
8. The differential propagation delay is defined as the delay from the crossing points of the differential input signals to the crossing point of the
differential output signals.
9. The single-ended propagation delay is defined as the delay from the 50% point of the input signal to the 50% point of the output signal.
10.The setup time is the minimum time that EN must be asserted prior to the next transition of IN/IN to prevent an output response greater than
±75 mV to that IN/IN transition.
11. The hold time is the minimum time that EN must remain asserted after a negative going IN or a positive going IN to prevent an output response
greater than ±75 mV to that IN/IN transition.
12.The release time is the minimum time that EN must be deasserted prior to the next IN/IN transition to ensure an output response that meets
the specified IN to Q propagation delay and output transition times.
13.The within-device skew is defined as the worst case difference between any two similar delay paths within a single device.


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