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MC74HC573AFELG Datenblatt(PDF) 1 Page - ON Semiconductor |
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MC74HC573AFELG Datenblatt(HTML) 1 Page - ON Semiconductor |
1 / 8 page © Semiconductor Components Industries, LLC, 2005 July, 2005 − Rev. 11 1 Publication Order Number: MC74HC573A/D MC74HC573A Octal 3−State Noninverting Transparent Latch High−Performance Silicon−Gate CMOS The MC74HC573A is identical in pinout to the LS573. The devices are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. These latches appear transparent to data (i.e., the outputs change asynchronously) when Latch Enable is high. When Latch Enable goes low, data meeting the setup and hold time becomes latched. The HC573A is identical in function to the HC373A but has the data inputs on the opposite side of the package from the outputs to facilitate PC board layout. Features • Output Drive Capability: 15 LSTTL Loads • Outputs Directly Interface to CMOS, NMOS and TTL • Operating Voltage Range: 2.0 to 6.0 V • Low Input Current: 1.0 mA • In Compliance with the JEDEC Standard No. 7.0 A Requirements • Chip Complexity: 218 FETs or 54.5 Equivalent Gates • Pb−Free Packages are Available* *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 20 1 1 20 MARKING DIAGRAMS SOIC−20 DW SUFFIX CASE 751D 74HC573A AWLYYWWG HC 573A ALYW G G TSSOP−20 DT SUFFIX CASE 948E SOEIAJ−20 F SUFFIX CASE 967 74HC573A AWLYWWG 1 1 1 20 1 20 20 20 See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. ORDERING INFORMATION PDIP−20 N SUFFIX CASE 738 1 20 MC74HC573AN AWLYYWWG 1 20 A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week G = Pb−Free Package G = Pb−Free Package (Note: Microdot may be in either location) |
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