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MC74HC74AN Datenblatt(PDF) 1 Page - ON Semiconductor |
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MC74HC74AN Datenblatt(HTML) 1 Page - ON Semiconductor |
1 / 9 page © Semiconductor Components Industries, LLC, 2006 October, 2006 − Rev. 11 1 Publication Order Number: MC74HC74A/D MC74HC74A Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS The MC74HC74A is identical in pinout to the LS74. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. This device consists of two D flip−flops with individual Set, Reset, and Clock inputs. Information at a D−input is transferred to the corresponding Q output on the next positive going edge of the clock input. Both Q and Q outputs are available from each flip−flop. The Set and Reset inputs are asynchronous. Features • Output Drive Capability: 10 LSTTL Loads • Outputs Directly Interface to CMOS, NMOS, and TTL • Operating Voltage Range: 2.0 to 6.0 V • Low Input Current: 1.0 mA • High Noise Immunity Characteristic of CMOS Devices • In Compliance with the JEDEC Standard No. 7.0 A Requirements • Chip Complexity: 128 FETs or 32 Equivalent Gates • Pb−Free Packages are Available http://onsemi.com MARKING DIAGRAMS A = Assembly Location L, WL = Wafer Lot Y, YY = Year W, WW = Work Week G or G = Pb−Free Package TSSOP−14 DT SUFFIX CASE 948G 14 1 SOEIAJ−14 F SUFFIX CASE 965 SOIC−14 D SUFFIX CASE 751A 14 1 1 14 74HC74A ALYWG HC74AG AWLYWW 14 1 1 14 HC 74A ALYWG G 1 14 14 1 PDIP−14 N SUFFIX CASE 646 MC74HC74AN AWLYYWWG 1 14 See detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet. ORDERING INFORMATION (Note: Microdot may be in either location) |
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