Datenblatt-Suchmaschine für elektronische Bauteile |
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74F280SC Datenblatt(PDF) 1 Page - Fairchild Semiconductor |
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74F280SC Datenblatt(HTML) 1 Page - Fairchild Semiconductor |
1 / 6 page © 2000 Fairchild Semiconductor Corporation DS009512 www.fairchildsemi.com April 1988 Revised September 2000 74F280 9-Bit Parity Generator/Checker General Description The F280 is a high-speed parity generator/checker that accepts nine bits of input data and detects whether an even or an odd number of these inputs is HIGH. If an even number of inputs is HIGH, the Sum Even output is HIGH. If an odd number is HIGH, the Sum Even output is LOW. The Sum Odd output is the complement of the Sum Even out- put. Ordering Code: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbols IEEE/IEC Connection Diagram Order Number Package Number Package Description 74F280SC M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow 74F280SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74F280PC N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide |
Ähnliche Teilenummer - 74F280SC |
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Ähnliche Beschreibung - 74F280SC |
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