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IRFZ48N Datenblatt(PDF) 5 Page - NXP Semiconductors |
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IRFZ48N Datenblatt(HTML) 5 Page - NXP Semiconductors |
5 / 8 page Philips Semiconductors Product specification N-channel enhancement mode IRFZ48N TrenchMOS TM transistor Fig.9. Normalised drain-source on-state resistance. a = R DS(ON)/RDS(ON)25 ˚C = f(Tj); ID = 25 A; VGS = 5 V Fig.10. Gate threshold voltage. V GS(TO) = f(Tj); conditions: ID = 1 mA; VDS = VGS Fig.11. Sub-threshold drain current. I D = f(VGS); conditions: Tj = 25 ˚C; VDS = VGS Fig.12. Typical capacitances, C iss, Coss, Crss. C = f(V DS); conditions: VGS = 0 V; f = 1 MHz Fig.13. Typical turn-on gate-charge characteristics. V GS = f(QG); conditions: ID = 50 A; parameter VDS Fig.14. Typical reverse diode current. I F = f(VSDS); conditions: VGS = 0 V; parameter Tj -100 -50 0 50 100 150 200 0.5 1 1.5 2 2.5 BUK959-60 Tmb / degC Rds(on) normlised to 25degC a 0.01 0.1 1 10 100 0 5 1 1.5 2 2.5 3 3.5 4 VDS/V Ciss Coss Crss BUK759-60 -100 -50 0 50 100 150 200 0 1 2 3 4 5 Tj / C VGS(TO) / V max. typ. min. 0 1020 30405060 0 2 4 6 8 10 12 VGS/V VDS = 14V VDS = 44V QG/nC 01 23 45 1E-06 1E-05 1E-04 1E-03 1E-02 1E-01 Sub-Threshold Conduction typ 2% 98% 0 0.2 0.4 0.6 0.8 1 1.2 1.4 0 20 40 60 80 100 IF/A VSDS/V Tj/C = 175 25 February 1999 5 Rev 1.000 |
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