Datenblatt-Suchmaschine für elektronische Bauteile |
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AM49DL640AH70IT Datenblatt(PDF) 11 Page - SPANSION |
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AM49DL640AH70IT Datenblatt(HTML) 11 Page - SPANSION |
11 / 63 page December 12, 2003 Am49DL640AH 9 ADV ANCE I N FO RMAT I O N ORDERING INFORMATION The order number (Valid Combination) is formed by the following: Valid Combinations Valid Combinations list configurations planned to be supported in vol- ume for this device. Consult the local AMD or Fujitsu sales office to confirm availability of specific valid combinations and to check on newly released combinations. MCP DEVICE BUS OPERATIONS This section describes the requirements and use of the device bus operations, which are initiated through the internal command register. The command register itself does not occupy any addressable memory loca- tion. The register is a latch used to store the com- mands, along with the address and data information needed to execute the command. The contents of the register serve as inputs to the internal state machine. The state machine outputs dictate the function of the device. Tables 1-2 lists the device bus operations, the inputs and control levels they require, and the resulting output. The following subsections describe each of these operations in further detail. Am49DL640 A H 70 I T TAPE AND REEL T = 7 inches S = 13 inches TEMPERATURE RANGE I = Industrial (–40 °C to +85°C) SPEED OPTION See Product Selector Guide and Valid Combinations PROCESS TECHNOLOGY H = 130 µm floating-gate technology pSRAM DEVICE DENSITY A = 16 Mbits AMD DEVICE NUMBER/DESCRIPTION Am49DL640AH Stacked Multi-Chip Package (MCP) Flash Memory and SRAM Am29DL640H 64 Megabit (4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 16 Mbit (1 M x 16-Bit) Pseudo Static RAM Valid Combinations Order Number Package Marking Am49DL640AH56I T, S M49000003J Am49DL640AH70I M49000003D Am49DL640AH85I M49000003E |
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