© 2005 Fairchild Semiconductor Corporation

DS500719

www.fairchildsemi.com

December 2001

Revised March 2005

74ALVC38

Low Voltage Quad 2-Input NAND Gate with

Open Drain Outputs and

3.6V Tolerant Inputs and Outputs

General Description

The ALVC38 contains four 2-input NAND gates with open

drain outputs. This product is designed for low voltage

3.6V.

The ALVC38 is fabricated with advanced CMOS technol-

ogy to achieve high-speed operation while maintaining

CMOS low power dissipation.

Features

s 3.6V tolerant inputs and outputs

s Power-off high impedance inputs and outputs

s Uses patented Quiet Series

¥ noise/EMI reduction

circuitry

s Latchup conforms to JEDEC JED78

s ESD performance:

Human body model

! 2000V

Machine model

! 250V

Ordering Code:

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Symbol

IEEE/IEC

Connection Diagram

Pin Descriptions

Quiet Series

¥ is a trademark of Fairchild Semiconductor Corporation.

Order Number

Package Number

Package Description

74ALVC38M

M14A

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

74ALVC38MTC

MTC14

14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Pin Names

Description

Inputs

Outputs