Datenblatt-Suchmaschine für elektronische Bauteile |
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FIN224ACGFX Datenblatt(PDF) 1 Page - Fairchild Semiconductor |
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FIN224ACGFX Datenblatt(HTML) 1 Page - Fairchild Semiconductor |
1 / 23 page November 2006 © 2006 Fairchild Semiconductor Corporation www.fairchildsemi.com FIN224AC Rev.1.1.2 Click here for this datasheet translated into Korean! FIN224AC µSerDes™ 22-Bit Bi-Directional Serializer/Deserializer Features ■ Industry smallest 22-bit Serializer/Deserializer pair ■ Low power for minimum impact on battery life – Multiple power-down modes ■ 100nA in standby mode, 5mA typical operating conditions ■ Highly rolled LVCMOS edge rate option to meet regulatory requirements ■ Cable reduction: 25:4 or greater ■ Differential signaling: ––90dBm EMI when using CTL in lab conditions –Minimized shielding –Minimized EMI filter –Minimum susceptibility to external interference ■ Up to 22 bits in either direction ■ Up to 26MHz parallel interface operation ■ Voltage translation from 1.65V to 3.6V ■ High ESD protection: > 15kV HBM ■ Parallel I/O power supply (VDDP) range, 1.65V - 3.6V ■ Can support Microcontroller or RGB pixel interface Applications ■ Image sensors ■ Small displays – LCD, cell phone, digital camera, portable gaming, printer, PDA, video camera, automotive FIN224AC to FIN24AC Comparison ■ Up to 20% power reduction ■ Double wide CKP pulse on FIN224AC, Mode 3 ■ Rolled edge rate for deserializer outputs on FIN224AC, for single display applications ■ Same voltage range ■ Same pinout and package General Description The FIN224AC µSerDes™ is a low-power Serializer/ Deserializer (SerDes) that can help minimize the cost and power of transferring wide signal paths. Through the use of serialization, the number of signals transferred from one point to another can be significantly reduced. Typical reduction is 4:1 to 6:1 for unidirectional paths. For bidirectional operation, using half duplex for multiple sources, it is possible to reach signal reduction close to 10:1. Through the use of differential signaling, shielding and EMI filters can also be minimized, further reducing the cost of serialization. The differential signaling is also important for providing a noise-insensitive signal that can withstand radio and electrical noise sources. Major reduction in power consumption allows minimal impact on battery life in ultra-portable applications. A unique word boundary technique assures that the actual word boundary is identified when the data is deserialized. This guarantees that each word is correctly aligned at the deserializer on a word-by-word basis through a unique sequence of clock and data that is not repeated except at the word boundary. It is possible to use a single PLL for most applications including bi-directional operation. Ordering Information Pb-Free package per JEDEC J-STD-020B. BGA and MLP packages available in tape and reel only. µSerDesTM is a trademark of Fairchild Semiconductor Corporation. Order Number Package Number Pb-Free Package Description FIN224ACGFX BGA042 Yes 42-Ball Ultra Small Scale Ball Grid Array (USS-BGA), JEDEC MO-195, 3.5mm Wide (Slow LVCMOS Edge Rate) FIN224ACMLX MLP040 Yes 40-Terminal Molded Leadless Package (MLP), Quad, JEDEC MO-220, 6mm Square (Slow LVCMOS Edge Rate) |
Ähnliche Teilenummer - FIN224ACGFX |
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Ähnliche Beschreibung - FIN224ACGFX |
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